X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fstr710.cfg;h=d26a8b1cf0650ed89b209b28245418b3e1951361;hp=8e5d36f0038533950ec7a99bcb7be39e13533ca9;hb=33d220d10a069be34095313f51ae22052a079b34;hpb=3e6f9e8d1e65c4da505ff78481d54a115520d3d1

diff --git a/tcl/target/str710.cfg b/tcl/target/str710.cfg
index 8e5d36f003..d26a8b1cf0 100644
--- a/tcl/target/str710.cfg
+++ b/tcl/target/str710.cfg
@@ -1,22 +1,22 @@
 #start slow, speed up after reset
-jtag_khz 10
+adapter_khz 10
 
 if { [info exists CHIPNAME] } {
-   set  _CHIPNAME $CHIPNAME
+   set _CHIPNAME $CHIPNAME
 } else {
-   set  _CHIPNAME str710
+   set _CHIPNAME str710
 }
 
 if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
+   set _ENDIAN $ENDIAN
 } else {
-   set  _ENDIAN little
+   set _ENDIAN little
 }
 
 if { [info exists CPUTAPID] } {
-   set  _CPUTAPID $CPUTAPID
+   set _CPUTAPID $CPUTAPID
 } else {
-   set  _CPUTAPID 0x3f0f0f0f
+   set _CPUTAPID 0x3f0f0f0f
 }
 
 #use combined on interfaces or targets that can't set TRST/SRST separately
@@ -27,10 +27,18 @@ reset_config trst_and_srst srst_pulls_trst
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
 
-$_TARGETNAME configure -event reset-start { jtag_khz 10 }
-$_TARGETNAME configure -event reset-init { jtag_khz 6000 }
+$_TARGETNAME configure -event reset-start { adapter_khz 10 }
+$_TARGETNAME configure -event reset-init {
+	adapter_khz 6000
+
+# Because the hardware cannot be interrogated for the protection state
+# of sectors, initialize all the sectors to be unprotected. The initial
+# state is reflected by the driver, too.
+	flash protect 0 0 last off
+	flash protect 1 0 last off
+}
 $_TARGETNAME configure -event gdb-flash-erase-start {
 	flash protect 0 0 7 off
 	flash protect 1 0 1 off
@@ -39,8 +47,7 @@ $_TARGETNAME configure -event gdb-flash-erase-start {
 $_TARGETNAME configure -work-area-phys 0x2000C000 -work-area-size 0x4000 -work-area-backup 0
 
 #flash bank str7x <base> <size> 0 0 <target#> <variant>
-flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x
-flash bank str7x 0x400C0000 0x00004000 0 0 0 STR71x
-
-# For more information about the configuration files, take a look at:
-# openocd.texi
+set _FLASHNAME $_CHIPNAME.flash0
+flash bank $_FLASHNAME str7x 0x40000000 0x00040000 0 0 $_TARGETNAME STR71x
+set _FLASHNAME $_CHIPNAME.flash1
+flash bank $_FLASHNAME str7x 0x400C0000 0x00004000 0 0 $_TARGETNAME STR71x