X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fstm8s.cfg;h=2dae6551571051e6f2724b0474e6e96cb1347496;hp=4768068e820e8410184e3fc596fcd92d65d59cca;hb=2bc24c06d3ae11d3ec5b128cb1af556669e6c708;hpb=38ac08c1c25adf42cf20e48e10e6ddeab6a12d71

diff --git a/tcl/target/stm8s.cfg b/tcl/target/stm8s.cfg
index 4768068e82..2dae655157 100644
--- a/tcl/target/stm8s.cfg
+++ b/tcl/target/stm8s.cfg
@@ -4,7 +4,7 @@
 # stm8 devices support SWIM transports only.
 #
 
-transport select stlink_swim
+transport select swim
 
 if { [info exists CHIPNAME] } {
    set _CHIPNAME $CHIPNAME
@@ -62,7 +62,7 @@ if { [info exists BLOCKSIZE] } {
    set _BLOCKSIZE 0x80
 }
 
-hla newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0
+swim newtap $_CHIPNAME cpu
 
 set _TARGETNAME $_CHIPNAME.cpu
 
@@ -75,8 +75,10 @@ $_TARGETNAME configure -optionstart $_OPTIONSTART -optionend $_OPTIONEND -blocks
 # Uncomment this line to enable interrupts while instruction step
 #$_TARGETNAME configure -enable_step_irq
 
-# The khz rate does not apply here, only slow <0> and fast <1>
-adapter speed 1
+# Set high speed
+adapter speed 800
+# Set low speed
+#adapter speed 363
 
 reset_config srst_only