X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fpic32mx.cfg;h=202668b88ae57a5ed317f9b9b9fbe104e54c66cc;hp=8c9a93d3814e301f8029f8dfe68d6d731d92c4a3;hb=3f9d377ce788365844f9225064cb9b0f0b4542ef;hpb=b559b273b526b3077b3ca219eecc8df9f86efac0

diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg
index 8c9a93d381..202668b88a 100644
--- a/tcl/target/pic32mx.cfg
+++ b/tcl/target/pic32mx.cfg
@@ -14,7 +14,7 @@ if { [info exists ENDIAN] } {
 if { [info exists CPUTAPID ] } {
    set _CPUTAPID $CPUTAPID
 } else {
-  # force an error till we get a good number
+   # force an error till we get a good number
    set _CPUTAPID 0x30938053
 }
 
@@ -29,9 +29,6 @@ if { [info exists WORKAREASIZE] } {
 adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config srst_only
-
 #jtag scan chain
 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
 jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
@@ -70,10 +67,17 @@ $_TARGETNAME configure -event reset-init {
 	mww 0xbf882030 $_PIC32MX_PROGSIZE
 }
 
-set _FLASHNAME $_CHIPNAME.flash
+set _FLASHNAME $_CHIPNAME.flash0
 flash bank $_FLASHNAME pic32mx 0x1fc00000 0 0 0 $_TARGETNAME
-set _FLASHNAME $_CHIPNAME.flash
+# add virtual banks for kseg0 and kseg1
+flash bank vbank0 virtual 0xbfc00000 0 0 0 $_TARGETNAME $_FLASHNAME
+flash bank vbank1 virtual 0x9fc00000 0 0 0 $_TARGETNAME $_FLASHNAME
+
+set _FLASHNAME $_CHIPNAME.flash1
 flash bank $_FLASHNAME pic32mx 0x1d000000 0 0 0 $_TARGETNAME
+# add virtual banks for kseg0 and kseg1
+flash bank vbank2 virtual 0xbd000000 0 0 0 $_TARGETNAME $_FLASHNAME
+flash bank vbank3 virtual 0x9d000000 0 0 0 $_TARGETNAME $_FLASHNAME
 
 # For more information about the configuration files, take a look at:
 # openocd.texi