X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Flpc2103.cfg;h=f55777f56508e9d9d610543b85f3cb3e4434d254;hp=13535f593748aa39475033ce5590924265325750;hb=HEAD;hpb=2dfa5e9c844a5a3f8aaca146c874f13570b8f667

diff --git a/tcl/target/lpc2103.cfg b/tcl/target/lpc2103.cfg
index 13535f5937..c49b0e5d55 100644
--- a/tcl/target/lpc2103.cfg
+++ b/tcl/target/lpc2103.cfg
@@ -1,39 +1,23 @@
-# NXP LPC2103 ARM7TDMI-S with 32kB Flash and 8kB SRAM, clocked with 12MHz crystal
+# SPDX-License-Identifier: GPL-2.0-or-later
 
-if { [info exists CHIPNAME] } {
-   set _CHIPNAME $CHIPNAME
-} else {
-   set _CHIPNAME lpc2103
-}
-
-if { [info exists ENDIAN] } {
-   set _ENDIAN $ENDIAN
-} else {
-   set _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
-   set _CPUTAPID $CPUTAPID
-} else {
-   set _CPUTAPID 0x4f1f0f0f
-}
-
-# LPC2000 -> SRST causes TRST
-reset_config trst_and_srst srst_pulls_trst
+# NXP LPC2103 ARM7TDMI-S with 32kB flash and 8kB SRAM, clocked with 12MHz crystal
 
-# reset delays
-jtag_nsrst_delay 100
-jtag_ntrst_delay 100
+source [find target/lpc2xxx.cfg]
 
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+# parameters:
+# - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000
+# - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000
 
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
+proc setup_lpc2103 {core_freq_khz adapter_freq_khz} {
+	# 32kB flash and 8kB SRAM
+	# setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
+	setup_lpc2xxx lpc2103 0x4f1f0f0f 0x8000 lpc2000_v2 0x2000 $core_freq_khz $adapter_freq_khz
+}
 
-# 8kB of internal SRAM
-$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x2000 -work-area-backup 0
+proc init_targets {} {
+	# default to core clocked with 12MHz crystal
+	echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different."
 
-# 32kB of internal Flash, core clocked with 12MHz crystal
-# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc_checksum]
-set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME lpc2000 0x0 0x8000 0 0 $_TARGETNAME lpc2000_v2 12000 calc_checksum
+	# setup_lpc2103 <core_freq_khz> <adapter_freq_khz>
+	setup_lpc2103 12000 1500
+}