X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fixp42x.cfg;h=d7b5bf47067eab91970f47253a265cc66fcbf848;hp=9dd9f517f16949ba169bc89f78319da9af8034c5;hb=HEAD;hpb=ca45e700b1c57caca2ef08e665e3c7e3e02ac8d3

diff --git a/tcl/target/ixp42x.cfg b/tcl/target/ixp42x.cfg
index 9dd9f517f1..5c8e903215 100644
--- a/tcl/target/ixp42x.cfg
+++ b/tcl/target/ixp42x.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 #xscale ixp42x CPU
 
 if { [info exists CHIPNAME] } {
@@ -27,7 +29,7 @@ set _CPUTAPID6 0x29277013
 jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID -expected-id $_CPUTAPID2 -expected-id $_CPUTAPID3 -expected-id $_CPUTAPID4 -expected-id $_CPUTAPID5 -expected-id $_CPUTAPID6
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ixp42x
+target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME
 
 
 # register constants for IXP42x SDRAM controller
@@ -66,17 +68,17 @@ set IXP42x_SDRAM_256MB_32Mx16_2BANK	0x0015
 
 # helper function to init SDRAM on IXP42x.
 # SDRAM_CFG: one of IXP42X_SDRAM_xxx
-# REFRESH: refresh counter reload value (integer) 
-# CASLAT: 2 or 3 
+# REFRESH: refresh counter reload value (integer)
+# CASLAT: 2 or 3
 proc ixp42x_init_sdram { SDRAM_CFG REFRESH CASLAT } {
 
     switch $CASLAT {
 	2 {
-	    set SDRAM_CFG [expr $SDRAM_CFG | $::IXP42x_SDRAM_CL2 ]
+	    set SDRAM_CFG [expr {$SDRAM_CFG | $::IXP42x_SDRAM_CL2} ]
 	    set CASCMD $::IXP425_SDRAM_IR_MODE_SET_CAS2_CMD
 	}
 	3 {
-	    set SDRAM_CFG [expr $SDRAM_CFG | $::IXP42x_SDRAM_CL3 ]
+	    set SDRAM_CFG [expr {$SDRAM_CFG | $::IXP42x_SDRAM_CL3} ]
 	    set CASCMD $::IXP425_SDRAM_IR_MODE_SET_CAS3_CMD
 	}
 	default { error [format "unsupported cas latency \"%s\" " $CASLAT] }
@@ -104,4 +106,3 @@ proc ixp42x_init_sdram { SDRAM_CFG REFRESH CASLAT } {
 proc ixp42x_set_bigendian { } {
     reg XSCALE_CTRL 0xF8
 }
-