X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fimx6.cfg;fp=tcl%2Ftarget%2Fimx6.cfg;h=11c2134cd8a1d7e947c8c37c1e714fd24c0c09d5;hp=afdf9614a5579a60236cd03f3e9fe428b9a3f67d;hb=b171c7ab16e1cbad3ca2a6a2cb0a26a3da735424;hpb=f8318d1b0d873ea4b4b78d2d5a71cf52932e4762;ds=sidebyside

diff --git a/tcl/target/imx6.cfg b/tcl/target/imx6.cfg
index afdf9614a5..11c2134cd8 100644
--- a/tcl/target/imx6.cfg
+++ b/tcl/target/imx6.cfg
@@ -27,10 +27,11 @@ if { [info exists SJC_TAPID] } {
 }
 set _SJC_TAPID2 0x2191c01d
 set _SJC_TAPID3 0x2191e01d
+set _SJC_TAPID4 0x1191c01d
 
 jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x01 -irmask 0x1f \
         -expected-id $_SJC_TAPID -expected-id $_SJC_TAPID2 \
-        -expected-id $_SJC_TAPID3
+        -expected-id $_SJC_TAPID3 -expected-id $_SJC_TAPID4
 
 # GDB target: Cortex-A9, using DAP, configuring only one core
 # Base addresses of cores: