X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fdsp568013.cfg;h=0c491fa959cc03eb9edc9061714ead73593ebb6f;hp=fa7c4d95126789ff47f89c8445fc37075f456507;hb=fccc55225a7f874ee9d795286e9d92dc051b5b9d;hpb=129f099ef19dd2082d3903600303fe5f4a2c4486 diff --git a/tcl/target/dsp568013.cfg b/tcl/target/dsp568013.cfg index fa7c4d9512..0c491fa959 100644 --- a/tcl/target/dsp568013.cfg +++ b/tcl/target/dsp568013.cfg @@ -1,22 +1,21 @@ # Script for freescale DSP568013 if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME -} else { - set _CHIPNAME dsp568013 + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME dsp568013 } if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN -} else { + set _ENDIAN $ENDIAN +} else { # this defaults to a big endian - set _ENDIAN little + set _ENDIAN little } -if { [info exists CPUTAPID ] } { +if { [info exists CPUTAPID] } { set _CPUTAPID $CPUTAPID } else { - # force an error till we get a good number set _CPUTAPID 0x01f2401d } @@ -36,7 +35,11 @@ set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME dsp5680xx -endian $_ENDIAN -chain-position $_TARGETNAME # Setup the interesting tap -jtag configure $_CHIPNAME.chp -event setup "jtag tapenable $_TARGETNAME" +# Disable polling to be able to get idcode from core tap. If re enabled, can be re enabled, but it should be disabled to correctly unlock flash (operations requiere certain instruction to be in the IR register during reset, and polling would change this) +jtag configure $_CHIPNAME.chp -event setup " + jtag tapenable $_TARGETNAME + poll off +" #select CORE tap by modifying the TLM register. #to be used when MASTER tap is selected. @@ -57,11 +60,11 @@ jtag configure $_CHIPNAME.chp -event tap-enable " #disables the master tap jtag configure $_TARGETNAME -event tap-disable " " -#TODO FIND SMARTER WAY. +#TODO FIND SMARTER WAY. jtag configure $_CHIPNAME.chp -event tap-disable " " -#TODO FIND SMARTER WAY. +#TODO FIND SMARTER WAY. #working area at base of ram