X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fat91sam9260_ext_RAM_ext_flash.cfg;h=9ab7409048eb7aada94386feb62375d72874db3e;hp=8acdebd7167822980146213303762f22b685d3d5;hb=bebdbe8b73b8d7cb2837687c0d38396fee0142fd;hpb=30da7c67cec8b315972377b5389735ff11f6042c

diff --git a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
index 8acdebd716..9ab7409048 100644
--- a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
+++ b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
@@ -1,52 +1,20 @@
-jtag_rclk 4
-
 ######################################
 # Target:    Atmel AT91SAM9260
 ######################################
 
-if { [info exists CHIPNAME] } {
-   set  _CHIPNAME $CHIPNAME
-} else {
-   set  _CHIPNAME at91sam9260
-}
-
-if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
-} else {
-   set  _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
-   set _CPUTAPID $CPUTAPID
-} else {
-  # force an error till we get a good number
-   set _CPUTAPID 0x0792603f
-}
+source [find target/at91sam9261.cfg]
 
 reset_config trst_and_srst
 
+adapter_khz 4
 
 adapter_nsrst_delay 200
 jtag_ntrst_delay 200
 
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-
-######################
-# Target configuration
-######################
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
-
-# Internal sram1 memory
-$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1
-
 scan_chain
 $_TARGETNAME configure -event reset-start {
 	# at reset chip runs at 32khz
-	jtag_rclk 8
+	adapter_khz 8
 }
 
 $_TARGETNAME configure -event reset-init {at91sam_init}
@@ -59,7 +27,7 @@ flash bank $_FLASHNAME cfi 0x10000000 0x01000000 2 2 $_TARGETNAME
 # Faster memory downloads. This is disabled automatically during
 # reset init since all reset init sequences are too short for
 # fast memory access
-arm7_9 dcc_downloads enable     
+arm7_9 dcc_downloads enable
 arm7_9 fast_memory_access enable
 
 proc at91sam_init { } {
@@ -78,7 +46,7 @@ proc at91sam_init { } {
 	sleep 10                          ;# wait 10 ms
 
 	# Now run at anything fast... ie: 10mhz!
-	jtag_rclk 10000                    ;# Increase JTAG Speed to 6 MHz
+	adapter_khz 10000                    ;# Increase JTAG Speed to 6 MHz
 
 	mww 0xffffec00 0x0a0a0a0a         ;# SMC_SETUP0 : Setup SMC for Intel NOR Flash JS28F128P30T85 128MBit
 	mww 0xffffec04 0x0b0b0b0b         ;# SMC_PULSE0