X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fat91sam4XXX.cfg;h=ca801431af1797f04ca07b2725645caa6fc71a7d;hp=1570114049adea21de211448473c888676b38f5a;hb=0c8ec7c826c60391034fe5f0ea90f8538ac94b38;hpb=f8a6a07149d88737f3d466e7ce620cc1f0874c6a

diff --git a/tcl/target/at91sam4XXX.cfg b/tcl/target/at91sam4XXX.cfg
index 1570114049..ca801431af 100644
--- a/tcl/target/at91sam4XXX.cfg
+++ b/tcl/target/at91sam4XXX.cfg
@@ -1,5 +1,5 @@
 #
-# script for ATMEL sam4, a CORTEX-M4 chip
+# script for ATMEL sam4, a Cortex-M4 chip
 #
 
 #
@@ -42,10 +42,6 @@ target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAM
 # 16K is plenty, the smallest chip has this much
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
-$_TARGETNAME configure -event gdb-flash-erase-start {
-    halt
-}
-
 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
 #
 # Since we may be running of an RC oscilator, we crank down the speed a
@@ -60,6 +56,8 @@ if {[using_jtag]} {
  jtag_ntrst_delay 100
 }
 
-# if srst is not fitted use SYSRESETREQ to
-# perform a soft reset
-cortex_m reset_config sysresetreq
+if {![using_hla]} {
+   # if srst is not fitted use SYSRESETREQ to
+   # perform a soft reset
+   cortex_m reset_config sysresetreq
+}