X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fat91sam4XXX.cfg;h=9c30ddfbaf66fa1abfc4eb4b8883797043149ff4;hp=c34121847798cee495d481f3ea7a33ab11821eb0;hb=HEAD;hpb=2ce4e31bbcfabc06b7ac71d2e507e707d293c5c0

diff --git a/tcl/target/at91sam4XXX.cfg b/tcl/target/at91sam4XXX.cfg
index c341218477..9c30ddfbaf 100644
--- a/tcl/target/at91sam4XXX.cfg
+++ b/tcl/target/at91sam4XXX.cfg
@@ -1,5 +1,13 @@
-# script for ATMEL sam4, a CORTEX-M4 chip
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# script for ATMEL sam4, a Cortex-M4 chip
+#
+
+#
+# sam4 devices can support both JTAG and SWD transports.
 #
+source [find target/swj-dp.tcl]
 
 if { [info exists CHIPNAME] } {
    set _CHIPNAME $CHIPNAME
@@ -13,17 +21,13 @@ if { [info exists ENDIAN] } {
    set _ENDIAN little
 }
 
-# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
-#
-# Since we may be running of an RC oscilator, we crank down the speed a
-# bit more to be on the safe side. Perhaps superstition, but if are
-# running off a crystal, we can run closer to the limit. Note
-# that there can be a pretty wide band where things are more or less stable.
-
-adapter_khz 500
-
-adapter_nsrst_delay 100
-jtag_ntrst_delay 100
+# Work-area is a space in RAM used for flash programming
+# By default use 64kB
+if { [info exists WORKAREASIZE] } {
+   set _WORKAREASIZE $WORKAREASIZE
+} else {
+   set _WORKAREASIZE 0x4000
+}
 
 #jtag scan chain
 if { [info exists CPUTAPID] } {
@@ -32,18 +36,31 @@ if { [info exists CPUTAPID] } {
    set _CPUTAPID 0x4ba00477
 }
 
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 # 16K is plenty, the smallest chip has this much
-$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
+#
+# Since we may be running of an RC oscilator, we crank down the speed a
+# bit more to be on the safe side. Perhaps superstition, but if are
+# running off a crystal, we can run closer to the limit. Note
+# that there can be a pretty wide band where things are more or less stable.
+
+adapter speed 500
 
-$_TARGETNAME configure -event gdb-flash-erase-start {
-    halt
+adapter srst delay 100
+if {[using_jtag]} {
+ jtag_ntrst_delay 100
 }
 
-# if srst is not fitted use SYSRESETREQ to
-# perform a soft reset
-cortex_m3 reset_config sysresetreq
+if {![using_hla]} {
+   # if srst is not fitted use SYSRESETREQ to
+   # perform a soft reset
+   cortex_m reset_config sysresetreq
+}