X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Fchip%2Fatmel%2Fat91%2Fat91sam9261.cfg;fp=tcl%2Fchip%2Fatmel%2Fat91%2Fat91sam9261.cfg;h=61b0c0bf3d5f845bb22efcf618bfcd5a88ed0f6d;hp=0000000000000000000000000000000000000000;hb=5d538084beaef161db21b9c7987cfbe881a29fc6;hpb=13cf987bb8110f9fce7e6bbb27e93da9665d83fc

diff --git a/tcl/chip/atmel/at91/at91sam9261.cfg b/tcl/chip/atmel/at91/at91sam9261.cfg
new file mode 100644
index 0000000000..61b0c0bf3d
--- /dev/null
+++ b/tcl/chip/atmel/at91/at91sam9261.cfg
@@ -0,0 +1,90 @@
+#
+# Peripheral identifiers/interrupts.
+#
+set AT91_ID_FIQ		0	;# Advanced Interrupt Controller (FIQ)
+set AT91_ID_SYS		1	;# System Peripherals
+set AT91SAM9261_ID_PIOA	2	;# Parallel IO Controller A
+set AT91SAM9261_ID_PIOB	3	;# Parallel IO Controller B
+set AT91SAM9261_ID_PIOC	4	;# Parallel IO Controller C
+set AT91SAM9261_ID_US0	6	;# USART 0
+set AT91SAM9261_ID_US1	7	;# USART 1
+set AT91SAM9261_ID_US2	8	;# USART 2
+set AT91SAM9261_ID_MCI	9	;# Multimedia Card Interface
+set AT91SAM9261_ID_UDP	10	;# USB Device Port
+set AT91SAM9261_ID_TWI	11	;# Two-Wire Interface
+set AT91SAM9261_ID_SPI0	12	;# Serial Peripheral Interface 0
+set AT91SAM9261_ID_SPI1	13	;# Serial Peripheral Interface 1
+set AT91SAM9261_ID_SSC0	14	;# Serial Synchronous Controller 0
+set AT91SAM9261_ID_SSC1	15	;# Serial Synchronous Controller 1
+set AT91SAM9261_ID_SSC2	16	;# Serial Synchronous Controller 2
+set AT91SAM9261_ID_TC0	17	;# Timer Counter 0
+set AT91SAM9261_ID_TC1	18	;# Timer Counter 1
+set AT91SAM9261_ID_TC2	19	;# Timer Counter 2
+set AT91SAM9261_ID_UHP	20	;# USB Host port
+set AT91SAM9261_ID_LCDC	21	;# LDC Controller
+set AT91SAM9261_ID_IRQ0	29	;# Advanced Interrupt Controller (IRQ0)
+set AT91SAM9261_ID_IRQ1	30	;# Advanced Interrupt Controller (IRQ1)
+set AT91SAM9261_ID_IRQ2	31	;# Advanced Interrupt Controller (IRQ2)
+
+
+#
+# User Peripheral physical base addresses.
+#
+set AT91SAM9261_BASE_TCB0		0xfffa0000
+set AT91SAM9261_BASE_TC0		0xfffa0000
+set AT91SAM9261_BASE_TC1		0xfffa0040
+set AT91SAM9261_BASE_TC2		0xfffa0080
+set AT91SAM9261_BASE_UDP		0xfffa4000
+set AT91SAM9261_BASE_MCI		0xfffa8000
+set AT91SAM9261_BASE_TWI		0xfffac000
+set AT91SAM9261_BASE_US0		0xfffb0000
+set AT91SAM9261_BASE_US1		0xfffb4000
+set AT91SAM9261_BASE_US2		0xfffb8000
+set AT91SAM9261_BASE_SSC0		0xfffbc000
+set AT91SAM9261_BASE_SSC1		0xfffc0000
+set AT91SAM9261_BASE_SSC2		0xfffc4000
+set AT91SAM9261_BASE_SPI0		0xfffc8000
+set AT91SAM9261_BASE_SPI1		0xfffcc000
+set AT91_BASE_SYS			0xffffea00
+
+
+#
+# System Peripherals (offset from AT91_BASE_SYS)
+#
+set AT91_SDRAMC	0xffffea00
+set AT91_SMC	0xffffec00
+set AT91_MATRIX	0xffffee00
+set AT91_AIC	0xfffff000
+set AT91_DBGU	0xfffff200
+set AT91_PIOA	0xfffff400
+set AT91_PIOB	0xfffff600
+set AT91_PIOC	0xfffff800
+set AT91_PMC	0xfffffc00
+set AT91_RSTC	0xfffffd00
+set AT91_SHDWC	0xfffffd10
+set AT91_RTT	0xfffffd20
+set AT91_PIT	0xfffffd30
+set AT91_WDT	0xfffffd40
+set AT91_GPBR	0xfffffd50
+
+set AT91_USART0	$AT91SAM9261_BASE_US0
+set AT91_USART1	$AT91SAM9261_BASE_US1
+set AT91_USART2	$AT91SAM9261_BASE_US2
+
+
+#
+# Internal Memory.
+#
+set AT91SAM9261_SRAM_BASE	0x00300000	;# Internal SRAM base address
+set AT91SAM9261_SRAM_SIZE	0x00028000	;# Internal SRAM size (160Kb)
+
+set AT91SAM9261_ROM_BASE	0x00400000	;# Internal ROM base address
+set AT91SAM9261_ROM_SIZE	0x00008000	;# Internal ROM size (32Kb)
+
+set AT91SAM9261_UHP_BASE	0x00500000	;# USB Host controller
+set AT91SAM9261_LCDC_BASE	0x00600000	;# LDC controller
+
+#
+# Cpu Name
+#
+set AT91_CPU_NAME	"AT91SAM9261"