X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fxscale.c;h=33dd3564183fc21c5ed39bd14ce1bf99cd8d6bd8;hp=640eb01b6712531ff41f5851cf4c8b4077a112bb;hb=ac927559c3ce5406adac34b9d4ca4ecb37a48181;hpb=cb7965da154793430d935f4965d7360198b711ba diff --git a/src/target/xscale.c b/src/target/xscale.c index 640eb01b67..33dd356418 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -63,9 +63,9 @@ static int xscale_debug_entry(target_t *); static int xscale_restore_context(target_t *); static int xscale_get_reg(reg_t *reg); static int xscale_set_reg(reg_t *reg, uint8_t *buf); -static int xscale_set_breakpoint(struct target_s *, breakpoint_t *); -static int xscale_set_watchpoint(struct target_s *, watchpoint_t *); -static int xscale_unset_breakpoint(struct target_s *, breakpoint_t *); +static int xscale_set_breakpoint(struct target_s *, struct breakpoint *); +static int xscale_set_watchpoint(struct target_s *, struct watchpoint *); +static int xscale_unset_breakpoint(struct target_s *, struct breakpoint *); static int xscale_read_trace(target_t *); @@ -106,7 +106,7 @@ static char *const xscale_reg_list[] = "XSCALE_TXRXCTRL", }; -static const xscale_reg_t xscale_reg_arch_info[] = +static const struct xscale_reg xscale_reg_arch_info[] = { {XSCALE_MAINID, NULL}, {XSCALE_CACHETYPE, NULL}, @@ -144,39 +144,26 @@ static int xscale_set_reg_u32(reg_t *reg, uint32_t value) return xscale_set_reg(reg, buf); } +static const char xscale_not[] = "target is not an XScale"; -static int xscale_get_arch_pointers(target_t *target, - armv4_5_common_t **armv4_5_p, xscale_common_t **xscale_p) +static int xscale_verify_pointer(struct command_context_s *cmd_ctx, + struct xscale_common *xscale) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; - - if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) - { - LOG_ERROR("target isn't an XScale target"); - return -1; - } - - if (xscale->common_magic != XSCALE_COMMON_MAGIC) - { - LOG_ERROR("target isn't an XScale target"); - return -1; + if (xscale->common_magic != XSCALE_COMMON_MAGIC) { + command_print(cmd_ctx, xscale_not); + return ERROR_TARGET_INVALID; } - - *armv4_5_p = armv4_5; - *xscale_p = xscale; - return ERROR_OK; } -static int xscale_jtag_set_instr(jtag_tap_t *tap, uint32_t new_instr) +static int xscale_jtag_set_instr(struct jtag_tap *tap, uint32_t new_instr) { if (tap == NULL) return ERROR_FAIL; if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) { - scan_field_t field; + struct scan_field field; uint8_t scratch[4]; memset(&field, 0, sizeof field); @@ -193,10 +180,9 @@ static int xscale_jtag_set_instr(jtag_tap_t *tap, uint32_t new_instr) static int xscale_read_dcsr(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); int retval; - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t field0 = 0x0; uint8_t field0_check_value = 0x2; uint8_t field0_check_mask = 0x7; @@ -272,7 +258,7 @@ static int xscale_receive(target_t *target, uint32_t *buffer, int num_words) int retval = ERROR_OK; tap_state_t path[3]; - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t *field0 = malloc(num_words * 1); uint8_t field0_check_value = 0x2; uint8_t field0_check_mask = 0x6; @@ -371,13 +357,12 @@ static int xscale_receive(target_t *target, uint32_t *buffer, int num_words) static int xscale_read_tx(target_t *target, int consume) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); tap_state_t path[3]; tap_state_t noconsume_path[6]; int retval; struct timeval timeout, now; - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t field0_in = 0x0; uint8_t field0_check_value = 0x2; uint8_t field0_check_mask = 0x6; @@ -470,11 +455,10 @@ static int xscale_read_tx(target_t *target, int consume) static int xscale_write_rx(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); int retval; struct timeval timeout, now; - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t field0_out = 0x0; uint8_t field0_in = 0x0; uint8_t field0_check_value = 0x2; @@ -620,8 +604,7 @@ static int xscale_send(target_t *target, uint8_t *buffer, int count, int size) static int xscale_send_u32(target_t *target, uint32_t value) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); buf_set_u32(xscale->reg_cache->reg_list[XSCALE_RX].value, 0, 32, value); return xscale_write_rx(target); @@ -629,10 +612,9 @@ static int xscale_send_u32(target_t *target, uint32_t value) static int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); int retval; - scan_field_t fields[3]; + struct scan_field fields[3]; uint8_t field0 = 0x0; uint8_t field0_check_value = 0x2; uint8_t field0_check_mask = 0x7; @@ -704,7 +686,7 @@ static int xscale_load_ic(target_t *target, uint32_t va, uint32_t buffer[8]) uint8_t packet[4]; uint8_t cmd; int word; - scan_field_t fields[2]; + struct scan_field fields[2]; LOG_DEBUG("loading miniIC at 0x%8.8" PRIx32 "", va); @@ -758,7 +740,7 @@ static int xscale_invalidate_ic_line(target_t *target, uint32_t va) { uint8_t packet[4]; uint8_t cmd; - scan_field_t fields[2]; + struct scan_field fields[2]; jtag_set_end_state(TAP_IDLE); xscale_jtag_set_instr(target->tap, XSCALE_LDIC); @@ -786,8 +768,7 @@ static int xscale_invalidate_ic_line(target_t *target, uint32_t va) static int xscale_update_vectors(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); int i; int retval; @@ -851,8 +832,8 @@ static int xscale_update_vectors(target_t *target) static int xscale_arch_state(struct target_s *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); + struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common; static const char *state[] = { @@ -890,8 +871,6 @@ static int xscale_arch_state(struct target_s *target) static int xscale_poll(target_t *target) { int retval = ERROR_OK; - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; if ((target->state == TARGET_RUNNING) || (target->state == TARGET_DEBUG_RUNNING)) { @@ -900,8 +879,6 @@ static int xscale_poll(target_t *target) { /* there's data to read from the tx register, we entered debug state */ - xscale->handler_running = 1; - target->state = TARGET_HALTED; /* process debug entry, fetching current mode regs */ @@ -933,13 +910,12 @@ static int xscale_poll(target_t *target) static int xscale_debug_entry(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); + struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common; uint32_t pc; uint32_t buffer[10]; int i; int retval; - uint32_t moe; /* clear external dbg break (will be written on next DCSR read) */ @@ -1114,8 +1090,7 @@ static int xscale_debug_entry(target_t *target) static int xscale_halt(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); LOG_DEBUG("target->state: %s", target_state_name(target)); @@ -1149,14 +1124,13 @@ static int xscale_halt(target_t *target) static int xscale_enable_single_step(struct target_s *target, uint32_t next_pc) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale= armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); reg_t *ibcr0 = &xscale->reg_cache->reg_list[XSCALE_IBCR0]; int retval; if (xscale->ibcr0_used) { - breakpoint_t *ibcr0_bp = breakpoint_find(target, buf_get_u32(ibcr0->value, 0, 32) & 0xfffffffe); + struct breakpoint *ibcr0_bp = breakpoint_find(target, buf_get_u32(ibcr0->value, 0, 32) & 0xfffffffe); if (ibcr0_bp) { @@ -1177,8 +1151,7 @@ static int xscale_enable_single_step(struct target_s *target, uint32_t next_pc) static int xscale_disable_single_step(struct target_s *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale= armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); reg_t *ibcr0 = &xscale->reg_cache->reg_list[XSCALE_IBCR0]; int retval; @@ -1190,7 +1163,7 @@ static int xscale_disable_single_step(struct target_s *target) static void xscale_enable_watchpoints(struct target_s *target) { - watchpoint_t *watchpoint = target->watchpoints; + struct watchpoint *watchpoint = target->watchpoints; while (watchpoint) { @@ -1202,7 +1175,7 @@ static void xscale_enable_watchpoints(struct target_s *target) static void xscale_enable_breakpoints(struct target_s *target) { - breakpoint_t *breakpoint = target->breakpoints; + struct breakpoint *breakpoint = target->breakpoints; /* set any pending breakpoints */ while (breakpoint) @@ -1216,12 +1189,10 @@ static void xscale_enable_breakpoints(struct target_s *target) static int xscale_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale= armv4_5->arch_info; - breakpoint_t *breakpoint = target->breakpoints; - + struct xscale_common *xscale = target_to_xscale(target); + struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common; + struct breakpoint *breakpoint = target->breakpoints; uint32_t current_pc; - int retval; int i; @@ -1365,17 +1336,14 @@ static int xscale_resume(struct target_s *target, int current, LOG_DEBUG("target resumed"); - xscale->handler_running = 1; - return ERROR_OK; } static int xscale_step_inner(struct target_s *target, int current, uint32_t address, int handle_breakpoints) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; - + struct xscale_common *xscale = target_to_xscale(target); + struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common; uint32_t next_pc; int retval; int i; @@ -1454,8 +1422,8 @@ static int xscale_step_inner(struct target_s *target, int current, static int xscale_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints) { - armv4_5_common_t *armv4_5 = target->arch_info; - breakpoint_t *breakpoint = target->breakpoints; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); + struct breakpoint *breakpoint = target->breakpoints; uint32_t current_pc; int retval; @@ -1508,8 +1476,7 @@ static int xscale_step(struct target_s *target, int current, static int xscale_assert_reset(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); LOG_DEBUG("target->state: %s", target_state_name(target)); @@ -1550,9 +1517,8 @@ static int xscale_assert_reset(target_t *target) static int xscale_deassert_reset(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; - breakpoint_t *breakpoint = target->breakpoints; + struct xscale_common *xscale = target_to_xscale(target); + struct breakpoint *breakpoint = target->breakpoints; LOG_DEBUG("-"); @@ -1574,7 +1540,17 @@ static int xscale_deassert_reset(target_t *target) breakpoint = breakpoint->next; } - if (!xscale->handler_installed) + armv4_5_invalidate_core_regs(target); + + /* FIXME mark hardware watchpoints got unset too. Also, + * at least some of the XScale registers are invalid... + */ + + /* + * REVISIT: *assumes* we had a SRST+TRST reset so the mini-icache + * contents got invalidated. Safer to force that, so writing new + * contents can't ever fail.. + */ { uint32_t address; unsigned buf_cnt; @@ -1599,10 +1575,6 @@ static int xscale_deassert_reset(target_t *target) * it's using halt mode (not monitor mode), it runs in * "Special Debug State" for access to registers, memory, * coprocessors, trace data, etc. - * - * REVISIT: *assumes* we've had a SRST+TRST reset so the - * mini-icache contents have been invalidated. Safest to - * force that, so writing new contents is reliable... */ address = xscale->handler_address; for (unsigned binary_size = sizeof xscale_debug_handler - 1; @@ -1673,10 +1645,6 @@ static int xscale_deassert_reset(target_t *target) xscale_resume(target, 1, 0x0, 1, 0); } } - else - { - jtag_add_reset(0, 0); - } return ERROR_OK; } @@ -1697,7 +1665,7 @@ static int xscale_write_core_reg(struct target_s *target, int num, static int xscale_full_context(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); uint32_t *buffer; @@ -1773,7 +1741,7 @@ static int xscale_full_context(target_t *target) static int xscale_restore_context(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); int i, j; @@ -1841,8 +1809,7 @@ static int xscale_restore_context(target_t *target) static int xscale_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); uint32_t *buf32; uint32_t i; int retval; @@ -1921,8 +1888,7 @@ static int xscale_read_memory(struct target_s *target, uint32_t address, static int xscale_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); int retval; LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32, address, size, count); @@ -2005,8 +1971,7 @@ static int xscale_bulk_write_memory(target_t *target, uint32_t address, static uint32_t xscale_get_ttb(target_t *target) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); uint32_t ttb; xscale_get_reg(&xscale->reg_cache->reg_list[XSCALE_TTB]); @@ -2018,8 +1983,7 @@ static uint32_t xscale_get_ttb(target_t *target) static void xscale_disable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); uint32_t cp15_control; /* read cp15 control register */ @@ -2058,8 +2022,7 @@ static void xscale_disable_mmu_caches(target_t *target, int mmu, static void xscale_enable_mmu_caches(target_t *target, int mmu, int d_u_cache, int i_cache) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); uint32_t cp15_control; /* read cp15 control register */ @@ -2083,11 +2046,10 @@ static void xscale_enable_mmu_caches(target_t *target, int mmu, } static int xscale_set_breakpoint(struct target_s *target, - breakpoint_t *breakpoint) + struct breakpoint *breakpoint) { int retval; - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); if (target->state != TARGET_HALTED) { @@ -2157,10 +2119,9 @@ static int xscale_set_breakpoint(struct target_s *target, } static int xscale_add_breakpoint(struct target_s *target, - breakpoint_t *breakpoint) + struct breakpoint *breakpoint) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); if (target->state != TARGET_HALTED) { @@ -2189,11 +2150,10 @@ static int xscale_add_breakpoint(struct target_s *target, } static int xscale_unset_breakpoint(struct target_s *target, - breakpoint_t *breakpoint) + struct breakpoint *breakpoint) { int retval; - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); if (target->state != TARGET_HALTED) { @@ -2244,10 +2204,9 @@ static int xscale_unset_breakpoint(struct target_s *target, return ERROR_OK; } -static int xscale_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint) +static int xscale_remove_breakpoint(struct target_s *target, struct breakpoint *breakpoint) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); if (target->state != TARGET_HALTED) { @@ -2267,10 +2226,9 @@ static int xscale_remove_breakpoint(struct target_s *target, breakpoint_t *break } static int xscale_set_watchpoint(struct target_s *target, - watchpoint_t *watchpoint) + struct watchpoint *watchpoint) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); uint8_t enable = 0; reg_t *dbcon = &xscale->reg_cache->reg_list[XSCALE_DBCON]; uint32_t dbcon_value = buf_get_u32(dbcon->value, 0, 32); @@ -2324,10 +2282,9 @@ static int xscale_set_watchpoint(struct target_s *target, } static int xscale_add_watchpoint(struct target_s *target, - watchpoint_t *watchpoint) + struct watchpoint *watchpoint) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); if (target->state != TARGET_HALTED) { @@ -2351,10 +2308,9 @@ static int xscale_add_watchpoint(struct target_s *target, } static int xscale_unset_watchpoint(struct target_s *target, - watchpoint_t *watchpoint) + struct watchpoint *watchpoint) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); reg_t *dbcon = &xscale->reg_cache->reg_list[XSCALE_DBCON]; uint32_t dbcon_value = buf_get_u32(dbcon->value, 0, 32); @@ -2387,10 +2343,9 @@ static int xscale_unset_watchpoint(struct target_s *target, return ERROR_OK; } -static int xscale_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint) +static int xscale_remove_watchpoint(struct target_s *target, struct watchpoint *watchpoint) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); if (target->state != TARGET_HALTED) { @@ -2410,10 +2365,9 @@ static int xscale_remove_watchpoint(struct target_s *target, watchpoint_t *watch static int xscale_get_reg(reg_t *reg) { - xscale_reg_t *arch_info = reg->arch_info; + struct xscale_reg *arch_info = reg->arch_info; target_t *target = arch_info->target; - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); /* DCSR, TX and RX are accessible via JTAG */ if (strcmp(reg->name, "XSCALE_DCSR") == 0) @@ -2456,10 +2410,9 @@ static int xscale_get_reg(reg_t *reg) static int xscale_set_reg(reg_t *reg, uint8_t* buf) { - xscale_reg_t *arch_info = reg->arch_info; + struct xscale_reg *arch_info = reg->arch_info; target_t *target = arch_info->target; - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); uint32_t value = buf_get_u32(buf, 0, 32); /* DCSR, TX and RX are accessible via JTAG */ @@ -2501,11 +2454,9 @@ static int xscale_set_reg(reg_t *reg, uint8_t* buf) static int xscale_write_dcsr_sw(target_t *target, uint32_t value) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); reg_t *dcsr = &xscale->reg_cache->reg_list[XSCALE_DCSR]; - xscale_reg_t *dcsr_arch_info = dcsr->arch_info; + struct xscale_reg *dcsr_arch_info = dcsr->arch_info; /* send CP write request (command 0x41) */ xscale_send_u32(target, 0x41); @@ -2522,10 +2473,9 @@ static int xscale_write_dcsr_sw(target_t *target, uint32_t value) static int xscale_read_trace(target_t *target) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; - xscale_trace_data_t **trace_data_p; + struct xscale_common *xscale = target_to_xscale(target); + struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common; + struct xscale_trace_data **trace_data_p; /* 258 words from debug handler * 256 trace buffer entries @@ -2579,12 +2529,12 @@ static int xscale_read_trace(target_t *target) for (trace_data_p = &xscale->trace.data; *trace_data_p; trace_data_p = &(*trace_data_p)->next) ; - *trace_data_p = malloc(sizeof(xscale_trace_data_t)); + *trace_data_p = malloc(sizeof(struct xscale_trace_data)); (*trace_data_p)->next = NULL; (*trace_data_p)->chkpt0 = trace_buffer[256]; (*trace_data_p)->chkpt1 = trace_buffer[257]; (*trace_data_p)->last_instruction = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32); - (*trace_data_p)->entries = malloc(sizeof(xscale_trace_entry_t) * (256 - j)); + (*trace_data_p)->entries = malloc(sizeof(struct xscale_trace_entry) * (256 - j)); (*trace_data_p)->depth = 256 - j; for (i = j; i < 256; i++) @@ -2600,11 +2550,9 @@ static int xscale_read_trace(target_t *target) } static int xscale_read_instruction(target_t *target, - arm_instruction_t *instruction) + struct arm_instruction *instruction) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); int i; int section = -1; uint32_t size_read; @@ -2666,7 +2614,7 @@ static int xscale_read_instruction(target_t *target, return ERROR_OK; } -static int xscale_branch_address(xscale_trace_data_t *trace_data, +static int xscale_branch_address(struct xscale_trace_data *trace_data, int i, uint32_t *target) { /* if there are less than four entries prior to the indirect branch message @@ -2684,12 +2632,10 @@ static int xscale_branch_address(xscale_trace_data_t *trace_data, static int xscale_analyze_trace(target_t *target, command_context_t *cmd_ctx) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); int next_pc_ok = 0; uint32_t next_pc = 0x0; - xscale_trace_data_t *trace_data = xscale->trace.data; + struct xscale_trace_data *trace_data = xscale->trace.data; int retval; while (trace_data) @@ -2777,7 +2723,7 @@ static int xscale_analyze_trace(target_t *target, command_context_t *cmd_ctx) if (xscale->trace.pc_ok) { int executed = (trace_data->entries[i].data & 0xf) + rollover * 16; - arm_instruction_t instruction; + struct arm_instruction instruction; if ((exception == 6) || (exception == 7)) { @@ -2849,7 +2795,7 @@ static int xscale_analyze_trace(target_t *target, command_context_t *cmd_ctx) for (; xscale->trace.current_pc < trace_data->last_instruction; xscale->trace.current_pc += (xscale->trace.core_state == ARMV4_5_STATE_ARM) ? 4 : 2) { - arm_instruction_t instruction; + struct arm_instruction instruction; if ((retval = xscale_read_instruction(target, &instruction)) != ERROR_OK) { /* can't continue tracing with no image available */ @@ -2873,14 +2819,12 @@ static int xscale_analyze_trace(target_t *target, command_context_t *cmd_ctx) static void xscale_build_reg_cache(target_t *target) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; - - reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache); - xscale_reg_t *arch_info = malloc(sizeof(xscale_reg_arch_info)); + struct xscale_common *xscale = target_to_xscale(target); + struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common; + struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache); + struct xscale_reg *arch_info = malloc(sizeof(xscale_reg_arch_info)); int i; - int num_regs = sizeof(xscale_reg_arch_info) / sizeof(xscale_reg_t); + int num_regs = sizeof(xscale_reg_arch_info) / sizeof(struct xscale_reg); (*cache_p) = armv4_5_build_reg_cache(target, armv4_5); armv4_5->core_cache = (*cache_p); @@ -2889,7 +2833,7 @@ static void xscale_build_reg_cache(target_t *target) if (xscale_reg_arch_type == -1) xscale_reg_arch_type = register_reg_arch_type(xscale_get_reg, xscale_set_reg); - (*cache_p)->next = malloc(sizeof(reg_cache_t)); + (*cache_p)->next = malloc(sizeof(struct reg_cache)); cache_p = &(*cache_p)->next; /* fill in values for the xscale reg cache */ @@ -2923,23 +2867,16 @@ static int xscale_init_target(struct command_context_s *cmd_ctx, return ERROR_OK; } -static int xscale_quit(void) -{ - jtag_add_runtest(100, TAP_RESET); - return ERROR_OK; -} - static int xscale_init_arch_info(target_t *target, - xscale_common_t *xscale, jtag_tap_t *tap, const char *variant) + struct xscale_common *xscale, struct jtag_tap *tap, const char *variant) { - armv4_5_common_t *armv4_5; + struct arm *armv4_5; uint32_t high_reset_branch, low_reset_branch; int i; armv4_5 = &xscale->armv4_5_common; /* store architecture specfic data (none so far) */ - xscale->arch_info = NULL; xscale->common_magic = XSCALE_COMMON_MAGIC; /* we don't really *need* variant info ... */ @@ -2967,8 +2904,6 @@ static int xscale_init_arch_info(target_t *target, } /* the debug handler isn't installed (and thus not running) at this time */ - xscale->handler_installed = 0; - xscale->handler_running = 0; xscale->handler_address = 0xfe000800; /* clear the vectors we keep locally for reference */ @@ -3039,7 +2974,7 @@ static int xscale_init_arch_info(target_t *target, static int xscale_target_create(struct target_s *target, Jim_Interp *interp) { - xscale_common_t *xscale; + struct xscale_common *xscale; if (sizeof xscale_debug_handler - 1 > 0x800) { LOG_ERROR("debug_handler.bin: larger than 2kb"); @@ -3054,14 +2989,11 @@ static int xscale_target_create(struct target_s *target, Jim_Interp *interp) target->variant); } -static int -xscale_handle_debug_handler_command(struct command_context_s *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(xscale_handle_debug_handler_command) { target_t *target = NULL; - armv4_5_common_t *armv4_5; - xscale_common_t *xscale; - + struct xscale_common *xscale; + int retval; uint32_t handler_address; if (argc < 2) @@ -3076,12 +3008,12 @@ xscale_handle_debug_handler_command(struct command_context_s *cmd_ctx, return ERROR_FAIL; } - if (xscale_get_arch_pointers(target, &armv4_5, &xscale) != ERROR_OK) - { - return ERROR_FAIL; - } + xscale = target_to_xscale(target); + retval = xscale_verify_pointer(cmd_ctx, xscale); + if (retval != ERROR_OK) + return retval; - handler_address = strtoul(args[1], NULL, 0); + COMMAND_PARSE_NUMBER(u32, args[1], handler_address); if (((handler_address >= 0x800) && (handler_address <= 0x1fef800)) || ((handler_address >= 0xfe000800) && (handler_address <= 0xfffff800))) @@ -3097,14 +3029,11 @@ xscale_handle_debug_handler_command(struct command_context_s *cmd_ctx, return ERROR_OK; } -static int -xscale_handle_cache_clean_address_command(struct command_context_s *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(xscale_handle_cache_clean_address_command) { target_t *target = NULL; - armv4_5_common_t *armv4_5; - xscale_common_t *xscale; - + struct xscale_common *xscale; + int retval; uint32_t cache_clean_address; if (argc < 2) @@ -3118,13 +3047,12 @@ xscale_handle_cache_clean_address_command(struct command_context_s *cmd_ctx, LOG_ERROR("target '%s' not defined", args[0]); return ERROR_FAIL; } + xscale = target_to_xscale(target); + retval = xscale_verify_pointer(cmd_ctx, xscale); + if (retval != ERROR_OK) + return retval; - if (xscale_get_arch_pointers(target, &armv4_5, &xscale) != ERROR_OK) - { - return ERROR_FAIL; - } - - cache_clean_address = strtoul(args[1], NULL, 0); + COMMAND_PARSE_NUMBER(u32, args[1], cache_clean_address); if (cache_clean_address & 0xffff) { @@ -3138,18 +3066,15 @@ xscale_handle_cache_clean_address_command(struct command_context_s *cmd_ctx, return ERROR_OK; } -static int -xscale_handle_cache_info_command(struct command_context_s *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(xscale_handle_cache_info_command) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - xscale_common_t *xscale; + struct xscale_common *xscale = target_to_xscale(target); + int retval; - if (xscale_get_arch_pointers(target, &armv4_5, &xscale) != ERROR_OK) - { - return ERROR_OK; - } + retval = xscale_verify_pointer(cmd_ctx, xscale); + if (retval != ERROR_OK) + return retval; return armv4_5_handle_cache_info_command(cmd_ctx, &xscale->armv4_5_mmu.armv4_5_cache); } @@ -3157,18 +3082,17 @@ xscale_handle_cache_info_command(struct command_context_s *cmd_ctx, static int xscale_virt2phys(struct target_s *target, uint32_t virtual, uint32_t *physical) { - armv4_5_common_t *armv4_5; - xscale_common_t *xscale; - int retval; + struct xscale_common *xscale = target_to_xscale(target); int type; uint32_t cb; int domain; uint32_t ap; - if ((retval = xscale_get_arch_pointers(target, &armv4_5, &xscale)) != ERROR_OK) - { - return retval; + if (xscale->common_magic != XSCALE_COMMON_MAGIC) { + LOG_ERROR(xscale_not); + return ERROR_TARGET_INVALID; } + uint32_t ret = armv4_5_mmu_translate_va(target, &xscale->armv4_5_mmu, virtual, &type, &cb, &domain, &ap); if (type == -1) { @@ -3180,8 +3104,7 @@ static int xscale_virt2phys(struct target_s *target, static int xscale_mmu(struct target_s *target, int *enabled) { - armv4_5_common_t *armv4_5 = target->arch_info; - xscale_common_t *xscale = armv4_5->arch_info; + struct xscale_common *xscale = target_to_xscale(target); if (target->state != TARGET_HALTED) { @@ -3192,21 +3115,19 @@ static int xscale_mmu(struct target_s *target, int *enabled) return ERROR_OK; } -static int xscale_handle_mmu_command(command_context_t *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(xscale_handle_mmu_command) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - xscale_common_t *xscale; + struct xscale_common *xscale = target_to_xscale(target); + int retval; - if (xscale_get_arch_pointers(target, &armv4_5, &xscale) != ERROR_OK) - { - return ERROR_OK; - } + retval = xscale_verify_pointer(cmd_ctx, xscale); + if (retval != ERROR_OK) + return retval; if (target->state != TARGET_HALTED) { - command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd); + command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); return ERROR_OK; } @@ -3229,28 +3150,26 @@ static int xscale_handle_mmu_command(command_context_t *cmd_ctx, return ERROR_OK; } -static int xscale_handle_idcache_command(command_context_t *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(xscale_handle_idcache_command) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - xscale_common_t *xscale; + struct xscale_common *xscale = target_to_xscale(target); int icache = 0, dcache = 0; + int retval; - if (xscale_get_arch_pointers(target, &armv4_5, &xscale) != ERROR_OK) - { - return ERROR_OK; - } + retval = xscale_verify_pointer(cmd_ctx, xscale); + if (retval != ERROR_OK) + return retval; if (target->state != TARGET_HALTED) { - command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd); + command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); return ERROR_OK; } - if (strcmp(cmd, "icache") == 0) + if (strcmp(CMD_NAME, "icache") == 0) icache = 1; - else if (strcmp(cmd, "dcache") == 0) + else if (strcmp(CMD_NAME, "dcache") == 0) dcache = 1; if (argc >= 1) @@ -3284,17 +3203,15 @@ static int xscale_handle_idcache_command(command_context_t *cmd_ctx, return ERROR_OK; } -static int xscale_handle_vector_catch_command(command_context_t *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(xscale_handle_vector_catch_command) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - xscale_common_t *xscale; + struct xscale_common *xscale = target_to_xscale(target); + int retval; - if (xscale_get_arch_pointers(target, &armv4_5, &xscale) != ERROR_OK) - { - return ERROR_OK; - } + retval = xscale_verify_pointer(cmd_ctx, xscale); + if (retval != ERROR_OK) + return retval; if (argc < 1) { @@ -3302,7 +3219,7 @@ static int xscale_handle_vector_catch_command(command_context_t *cmd_ctx, } else { - xscale->vector_catch = strtoul(args[0], NULL, 0); + COMMAND_PARSE_NUMBER(u8, args[0], xscale->vector_catch); buf_set_u32(xscale->reg_cache->reg_list[XSCALE_DCSR].value, 16, 8, xscale->vector_catch); xscale_write_dcsr(target, -1, -1); } @@ -3313,18 +3230,16 @@ static int xscale_handle_vector_catch_command(command_context_t *cmd_ctx, } -static int xscale_handle_vector_table_command(command_context_t *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(xscale_handle_vector_table_command) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - xscale_common_t *xscale; + struct xscale_common *xscale = target_to_xscale(target); int err = 0; + int retval; - if (xscale_get_arch_pointers(target, &armv4_5, &xscale) != ERROR_OK) - { - return ERROR_OK; - } + retval = xscale_verify_pointer(cmd_ctx, xscale); + if (retval != ERROR_OK) + return retval; if (argc == 0) /* print current settings */ { @@ -3345,9 +3260,9 @@ static int xscale_handle_vector_table_command(command_context_t *cmd_ctx, else { int idx; + COMMAND_PARSE_NUMBER(int, args[1], idx); uint32_t vec; - idx = strtoul(args[1], NULL, 0); - vec = strtoul(args[2], NULL, 0); + COMMAND_PARSE_NUMBER(u32, args[2], vec); if (idx < 1 || idx >= 8) err = 1; @@ -3373,29 +3288,27 @@ static int xscale_handle_vector_table_command(command_context_t *cmd_ctx, } -static int -xscale_handle_trace_buffer_command(struct command_context_s *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(xscale_handle_trace_buffer_command) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - xscale_common_t *xscale; + struct xscale_common *xscale = target_to_xscale(target); + struct armv4_5_common_s *armv4_5 = &xscale->armv4_5_common; uint32_t dcsr_value; + int retval; - if (xscale_get_arch_pointers(target, &armv4_5, &xscale) != ERROR_OK) - { - return ERROR_OK; - } + retval = xscale_verify_pointer(cmd_ctx, xscale); + if (retval != ERROR_OK) + return retval; if (target->state != TARGET_HALTED) { - command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd); + command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); return ERROR_OK; } if ((argc >= 1) && (strcmp("enable", args[0]) == 0)) { - xscale_trace_data_t *td, *next_td; + struct xscale_trace_data *td, *next_td; xscale->trace.buffer_enabled = 1; /* free old trace data */ @@ -3418,10 +3331,10 @@ xscale_handle_trace_buffer_command(struct command_context_s *cmd_ctx, if ((argc >= 2) && (strcmp("fill", args[1]) == 0)) { + uint32_t fill = 1; if (argc >= 3) - xscale->trace.buffer_fill = strtoul(args[2], NULL, 0); - else - xscale->trace.buffer_fill = 1; + COMMAND_PARSE_NUMBER(u32, args[2], fill); + xscale->trace.buffer_fill = fill; } else if ((argc >= 2) && (strcmp("wrap", args[1]) == 0)) { @@ -3454,13 +3367,11 @@ xscale_handle_trace_buffer_command(struct command_context_s *cmd_ctx, return ERROR_OK; } -static int -xscale_handle_trace_image_command(struct command_context_s *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(xscale_handle_trace_image_command) { - target_t *target; - armv4_5_common_t *armv4_5; - xscale_common_t *xscale; + target_t *target = get_current_target(cmd_ctx); + struct xscale_common *xscale = target_to_xscale(target); + int retval; if (argc < 1) { @@ -3468,12 +3379,9 @@ xscale_handle_trace_image_command(struct command_context_s *cmd_ctx, return ERROR_OK; } - target = get_current_target(cmd_ctx); - - if (xscale_get_arch_pointers(target, &armv4_5, &xscale) != ERROR_OK) - { - return ERROR_OK; - } + retval = xscale_verify_pointer(cmd_ctx, xscale); + if (retval != ERROR_OK) + return retval; if (xscale->trace.image) { @@ -3482,7 +3390,7 @@ xscale_handle_trace_image_command(struct command_context_s *cmd_ctx, command_print(cmd_ctx, "previously loaded image found and closed"); } - xscale->trace.image = malloc(sizeof(image_t)); + xscale->trace.image = malloc(sizeof(struct image)); xscale->trace.image->base_address_set = 0; xscale->trace.image->start_address_set = 0; @@ -3490,7 +3398,7 @@ xscale_handle_trace_image_command(struct command_context_s *cmd_ctx, if (argc >= 2) { xscale->trace.image->base_address_set = 1; - xscale->trace.image->base_address = strtoul(args[1], NULL, 0); + COMMAND_PARSE_NUMBER(int, args[1], xscale->trace.image->base_address); } else { @@ -3507,23 +3415,21 @@ xscale_handle_trace_image_command(struct command_context_s *cmd_ctx, return ERROR_OK; } -static int xscale_handle_dump_trace_command(struct command_context_s *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(xscale_handle_dump_trace_command) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - xscale_common_t *xscale; - xscale_trace_data_t *trace_data; - fileio_t file; + struct xscale_common *xscale = target_to_xscale(target); + struct xscale_trace_data *trace_data; + struct fileio file; + int retval; - if (xscale_get_arch_pointers(target, &armv4_5, &xscale) != ERROR_OK) - { - return ERROR_OK; - } + retval = xscale_verify_pointer(cmd_ctx, xscale); + if (retval != ERROR_OK) + return retval; if (target->state != TARGET_HALTED) { - command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd); + command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); return ERROR_OK; } @@ -3566,46 +3472,41 @@ static int xscale_handle_dump_trace_command(struct command_context_s *cmd_ctx, return ERROR_OK; } -static int -xscale_handle_analyze_trace_buffer_command(struct command_context_s *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(xscale_handle_analyze_trace_buffer_command) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - xscale_common_t *xscale; + struct xscale_common *xscale = target_to_xscale(target); + int retval; - if (xscale_get_arch_pointers(target, &armv4_5, &xscale) != ERROR_OK) - { - return ERROR_OK; - } + retval = xscale_verify_pointer(cmd_ctx, xscale); + if (retval != ERROR_OK) + return retval; xscale_analyze_trace(target, cmd_ctx); return ERROR_OK; } -static int xscale_handle_cp15(command_context_t *cmd_ctx, - char *cmd, char **args, int argc) +COMMAND_HANDLER(xscale_handle_cp15) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - xscale_common_t *xscale; + struct xscale_common *xscale = target_to_xscale(target); + int retval; - if (xscale_get_arch_pointers(target, &armv4_5, &xscale) != ERROR_OK) - { - return ERROR_OK; - } + retval = xscale_verify_pointer(cmd_ctx, xscale); + if (retval != ERROR_OK) + return retval; if (target->state != TARGET_HALTED) { - command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd); + command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); return ERROR_OK; } uint32_t reg_no = 0; reg_t *reg = NULL; if (argc > 0) { - reg_no = strtoul(args[0], NULL, 0); + COMMAND_PARSE_NUMBER(u32, args[0], reg_no); /*translate from xscale cp15 register no to openocd register*/ switch (reg_no) { @@ -3651,8 +3552,8 @@ static int xscale_handle_cp15(command_context_t *cmd_ctx, } else if (argc == 2) { - - uint32_t value = strtoul(args[1], NULL, 0); + uint32_t value; + COMMAND_PARSE_NUMBER(u32, args[1], value); /* send CP write request (command 0x41) */ xscale_send_u32(target, 0x41); @@ -3705,7 +3606,7 @@ static int xscale_register_commands(struct command_context_s *cmd_ctx) return ERROR_OK; } -target_type_t xscale_target = +struct target_type xscale_target = { .name = "xscale", @@ -3740,7 +3641,6 @@ target_type_t xscale_target = .register_commands = xscale_register_commands, .target_create = xscale_target_create, .init_target = xscale_init_target, - .quit = xscale_quit, .virt2phys = xscale_virt2phys, .mmu = xscale_mmu