X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fnds32_cmd.c;h=88d8b45124225c5bed1037d5fe99922663e018d1;hp=08923643c3c1bd5da5ef9ae9152181b5e5b85bff;hb=6572dd97b3a6e9c6afea81d47a507683ecc95698;hpb=586575c9dcc18154eeb4e893e554371c69ac0b9d diff --git a/src/target/nds32_cmd.c b/src/target/nds32_cmd.c index 08923643c3..88d8b45124 100644 --- a/src/target/nds32_cmd.c +++ b/src/target/nds32_cmd.c @@ -13,9 +13,7 @@ * GNU General Public License for more details. * * * * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * + * along with this program. If not, see . * ***************************************************************************/ #ifdef HAVE_CONFIG_H @@ -48,7 +46,7 @@ COMMAND_HANDLER(handle_nds32_dssim_command) struct nds32 *nds32 = target_to_nds32(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } @@ -59,7 +57,8 @@ COMMAND_HANDLER(handle_nds32_dssim_command) nds32->step_isr_enable = false; } - command_print(CMD_CTX, "$INT_MASK.DSSIM: %d", nds32->step_isr_enable); + command_print(CMD, "%s: $INT_MASK.DSSIM: %d", target_name(target), + nds32->step_isr_enable); return ERROR_OK; } @@ -72,7 +71,7 @@ COMMAND_HANDLER(handle_nds32_memory_access_command) struct nds32_memory *memory = &(nds32->memory); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } @@ -89,7 +88,8 @@ COMMAND_HANDLER(handle_nds32_memory_access_command) aice_memory_access(aice, memory->access_channel); } else { - command_print(CMD_CTX, "memory access channel: %s", + command_print(CMD, "%s: memory access channel: %s", + target_name(target), NDS_MEMORY_ACCESS_NAME[memory->access_channel]); } @@ -103,19 +103,20 @@ COMMAND_HANDLER(handle_nds32_memory_mode_command) struct aice_port_s *aice = target_to_aice(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } if (CMD_ARGC > 0) { if (nds32->edm.access_control == false) { - command_print(CMD_CTX, "Target does not support ACC_CTL. " - "Set memory mode to MEMORY"); + command_print(CMD, "%s does not support ACC_CTL. " + "Set memory mode to MEMORY", target_name(target)); nds32->memory.mode = NDS_MEMORY_SELECT_MEM; } else if (nds32->edm.direct_access_local_memory == false) { - command_print(CMD_CTX, "Target does not support direct access " - "local memory. Set memory mode to MEMORY"); + command_print(CMD, "%s does not support direct access " + "local memory. Set memory mode to MEMORY", + target_name(target)); nds32->memory.mode = NDS_MEMORY_SELECT_MEM; /* set to ACC_CTL */ @@ -127,12 +128,14 @@ COMMAND_HANDLER(handle_nds32_memory_mode_command) nds32->memory.mode = NDS_MEMORY_SELECT_MEM; } else if (strcmp(CMD_ARGV[0], "ilm") == 0) { if (nds32->memory.ilm_base == 0) - command_print(CMD_CTX, "Target does not support ILM"); + command_print(CMD, "%s does not support ILM", + target_name(target)); else nds32->memory.mode = NDS_MEMORY_SELECT_ILM; } else if (strcmp(CMD_ARGV[0], "dlm") == 0) { if (nds32->memory.dlm_base == 0) - command_print(CMD_CTX, "Target does not support DLM"); + command_print(CMD, "%s does not support DLM", + target_name(target)); else nds32->memory.mode = NDS_MEMORY_SELECT_DLM; } @@ -142,7 +145,8 @@ COMMAND_HANDLER(handle_nds32_memory_mode_command) } } - command_print(CMD_CTX, "memory mode: %s", + command_print(CMD, "%s: memory mode: %s", + target_name(target), NDS_MEMORY_SELECT_NAME[nds32->memory.mode]); return ERROR_OK; @@ -158,7 +162,7 @@ COMMAND_HANDLER(handle_nds32_cache_command) int result; if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } @@ -169,44 +173,54 @@ COMMAND_HANDLER(handle_nds32_cache_command) /* D$ write back */ result = aice_cache_ctl(aice, AICE_CACHE_CTL_L1D_WBALL, 0); if (result != ERROR_OK) { - command_print(CMD_CTX, "Write back data cache...failed"); + command_print(CMD, "%s: Write back data cache...failed", + target_name(target)); return result; } - command_print(CMD_CTX, "Write back data cache...done"); + command_print(CMD, "%s: Write back data cache...done", + target_name(target)); /* D$ invalidate */ result = aice_cache_ctl(aice, AICE_CACHE_CTL_L1D_INVALALL, 0); if (result != ERROR_OK) { - command_print(CMD_CTX, "Invalidate data cache...failed"); + command_print(CMD, "%s: Invalidate data cache...failed", + target_name(target)); return result; } - command_print(CMD_CTX, "Invalidate data cache...done"); + command_print(CMD, "%s: Invalidate data cache...done", + target_name(target)); } else { if (dcache->line_size == 0) - command_print(CMD_CTX, "No data cache"); + command_print(CMD, "%s: No data cache", + target_name(target)); else - command_print(CMD_CTX, "Data cache disabled"); + command_print(CMD, "%s: Data cache disabled", + target_name(target)); } if ((icache->line_size != 0) && (icache->enable == true)) { /* I$ invalidate */ result = aice_cache_ctl(aice, AICE_CACHE_CTL_L1I_INVALALL, 0); if (result != ERROR_OK) { - command_print(CMD_CTX, "Invalidate instruction cache...failed"); + command_print(CMD, "%s: Invalidate instruction cache...failed", + target_name(target)); return result; } - command_print(CMD_CTX, "Invalidate instruction cache...done"); + command_print(CMD, "%s: Invalidate instruction cache...done", + target_name(target)); } else { if (icache->line_size == 0) - command_print(CMD_CTX, "No instruction cache"); + command_print(CMD, "%s: No instruction cache", + target_name(target)); else - command_print(CMD_CTX, "Instruction cache disabled"); + command_print(CMD, "%s: Instruction cache disabled", + target_name(target)); } } else - command_print(CMD_CTX, "No valid parameter"); + command_print(CMD, "No valid parameter"); } return ERROR_OK; @@ -221,14 +235,15 @@ COMMAND_HANDLER(handle_nds32_icache_command) int result; if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } if (CMD_ARGC > 0) { if (icache->line_size == 0) { - command_print(CMD_CTX, "No instruction cache"); + command_print(CMD, "%s: No instruction cache", + target_name(target)); return ERROR_OK; } @@ -237,13 +252,16 @@ COMMAND_HANDLER(handle_nds32_icache_command) /* I$ invalidate */ result = aice_cache_ctl(aice, AICE_CACHE_CTL_L1I_INVALALL, 0); if (result != ERROR_OK) { - command_print(CMD_CTX, "Invalidate instruction cache...failed"); + command_print(CMD, "%s: Invalidate instruction cache...failed", + target_name(target)); return result; } - command_print(CMD_CTX, "Invalidate instruction cache...done"); + command_print(CMD, "%s: Invalidate instruction cache...done", + target_name(target)); } else { - command_print(CMD_CTX, "Instruction cache disabled"); + command_print(CMD, "%s: Instruction cache disabled", + target_name(target)); } } else if (strcmp(CMD_ARGV[0], "enable") == 0) { uint32_t value; @@ -256,7 +274,7 @@ COMMAND_HANDLER(handle_nds32_icache_command) } else if (strcmp(CMD_ARGV[0], "dump") == 0) { /* TODO: dump cache content */ } else { - command_print(CMD_CTX, "No valid parameter"); + command_print(CMD, "%s: No valid parameter", target_name(target)); } } @@ -272,14 +290,14 @@ COMMAND_HANDLER(handle_nds32_dcache_command) int result; if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } if (CMD_ARGC > 0) { if (dcache->line_size == 0) { - command_print(CMD_CTX, "No data cache"); + command_print(CMD, "%s: No data cache", target_name(target)); return ERROR_OK; } @@ -288,22 +306,27 @@ COMMAND_HANDLER(handle_nds32_dcache_command) /* D$ write back */ result = aice_cache_ctl(aice, AICE_CACHE_CTL_L1D_WBALL, 0); if (result != ERROR_OK) { - command_print(CMD_CTX, "Write back data cache...failed"); + command_print(CMD, "%s: Write back data cache...failed", + target_name(target)); return result; } - command_print(CMD_CTX, "Write back data cache...done"); + command_print(CMD, "%s: Write back data cache...done", + target_name(target)); /* D$ invalidate */ result = aice_cache_ctl(aice, AICE_CACHE_CTL_L1D_INVALALL, 0); if (result != ERROR_OK) { - command_print(CMD_CTX, "Invalidate data cache...failed"); + command_print(CMD, "%s: Invalidate data cache...failed", + target_name(target)); return result; } - command_print(CMD_CTX, "Invalidate data cache...done"); + command_print(CMD, "%s: Invalidate data cache...done", + target_name(target)); } else { - command_print(CMD_CTX, "Data cache disabled"); + command_print(CMD, "%s: Data cache disabled", + target_name(target)); } } else if (strcmp(CMD_ARGV[0], "enable") == 0) { uint32_t value; @@ -316,7 +339,7 @@ COMMAND_HANDLER(handle_nds32_dcache_command) } else if (strcmp(CMD_ARGV[0], "dump") == 0) { /* TODO: dump cache content */ } else { - command_print(CMD_CTX, "No valid parameter"); + command_print(CMD, "%s: No valid parameter", target_name(target)); } } @@ -329,7 +352,7 @@ COMMAND_HANDLER(handle_nds32_auto_break_command) struct nds32 *nds32 = target_to_nds32(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } @@ -341,9 +364,11 @@ COMMAND_HANDLER(handle_nds32_auto_break_command) } if (nds32->auto_convert_hw_bp) - command_print(CMD_CTX, "convert sw break to hw break on ROM: on"); + command_print(CMD, "%s: convert sw break to hw break on ROM: on", + target_name(target)); else - command_print(CMD_CTX, "convert sw break to hw break on ROM: off"); + command_print(CMD, "%s: convert sw break to hw break on ROM: off", + target_name(target)); return ERROR_OK; } @@ -354,7 +379,7 @@ COMMAND_HANDLER(handle_nds32_virtual_hosting_command) struct nds32 *nds32 = target_to_nds32(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } @@ -366,9 +391,9 @@ COMMAND_HANDLER(handle_nds32_virtual_hosting_command) } if (nds32->virtual_hosting) - LOG_INFO("virtual hosting: on"); + command_print(CMD, "%s: virtual hosting: on", target_name(target)); else - LOG_INFO("virtual hosting: off"); + command_print(CMD, "%s: virtual hosting: off", target_name(target)); return ERROR_OK; } @@ -379,7 +404,7 @@ COMMAND_HANDLER(handle_nds32_global_stop_command) struct nds32 *nds32 = target_to_nds32(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } @@ -391,9 +416,9 @@ COMMAND_HANDLER(handle_nds32_global_stop_command) } if (nds32->global_stop) - LOG_INFO("global stop: on"); + LOG_INFO("%s: global stop: on", target_name(target)); else - LOG_INFO("global stop: off"); + LOG_INFO("%s: global stop: off", target_name(target)); return ERROR_OK; } @@ -404,7 +429,7 @@ COMMAND_HANDLER(handle_nds32_soft_reset_halt_command) struct nds32 *nds32 = target_to_nds32(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } @@ -416,9 +441,9 @@ COMMAND_HANDLER(handle_nds32_soft_reset_halt_command) } if (nds32->soft_reset_halt) - LOG_INFO("soft-reset-halt: on"); + LOG_INFO("%s: soft-reset-halt: on", target_name(target)); else - LOG_INFO("soft-reset-halt: off"); + LOG_INFO("%s: soft-reset-halt: off", target_name(target)); return ERROR_OK; } @@ -429,7 +454,7 @@ COMMAND_HANDLER(handle_nds32_boot_time_command) struct nds32 *nds32 = target_to_nds32(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } @@ -445,14 +470,12 @@ COMMAND_HANDLER(handle_nds32_login_edm_passcode_command) struct nds32 *nds32 = target_to_nds32(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } nds32->edm_passcode = strdup(CMD_ARGV[0]); - LOG_INFO("set EDM passcode: %s", nds32->edm_passcode); - return ERROR_OK; } @@ -462,7 +485,7 @@ COMMAND_HANDLER(handle_nds32_login_edm_operation_command) struct nds32 *nds32 = target_to_nds32(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } @@ -493,7 +516,7 @@ COMMAND_HANDLER(handle_nds32_reset_halt_as_init_command) struct nds32 *nds32 = target_to_nds32(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } @@ -513,7 +536,7 @@ COMMAND_HANDLER(handle_nds32_keep_target_edm_ctl_command) struct nds32 *nds32 = target_to_nds32(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } @@ -533,7 +556,7 @@ COMMAND_HANDLER(handle_nds32_decode_command) struct nds32 *nds32 = target_to_nds32(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } @@ -558,7 +581,7 @@ COMMAND_HANDLER(handle_nds32_decode_command) read_addr, &instruction)) return ERROR_FAIL; - command_print(CMD_CTX, "%s", instruction.text); + command_print(CMD, "%s", instruction.text); read_addr += instruction.instruction_size; i++; @@ -576,7 +599,7 @@ COMMAND_HANDLER(handle_nds32_decode_command) if (ERROR_OK != nds32_evaluate_opcode(nds32, opcode, addr, &instruction)) return ERROR_FAIL; - command_print(CMD_CTX, "%s", instruction.text); + command_print(CMD, "%s", instruction.text); } else return ERROR_FAIL; @@ -589,7 +612,7 @@ COMMAND_HANDLER(handle_nds32_word_access_mem_command) struct nds32 *nds32 = target_to_nds32(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } @@ -609,11 +632,11 @@ COMMAND_HANDLER(handle_nds32_query_target_command) struct nds32 *nds32 = target_to_nds32(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } - command_print(CMD_CTX, "OCD"); + command_print(CMD, "OCD"); return ERROR_OK; } @@ -624,7 +647,7 @@ COMMAND_HANDLER(handle_nds32_query_endian_command) struct nds32 *nds32 = target_to_nds32(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } @@ -632,9 +655,9 @@ COMMAND_HANDLER(handle_nds32_query_endian_command) nds32_get_mapped_reg(nds32, IR0, &value_psw); if (value_psw & 0x20) - command_print(CMD_CTX, "BE"); + command_print(CMD, "%s: BE", target_name(target)); else - command_print(CMD_CTX, "LE"); + command_print(CMD, "%s: LE", target_name(target)); return ERROR_OK; } @@ -645,11 +668,11 @@ COMMAND_HANDLER(handle_nds32_query_cpuid_command) struct nds32 *nds32 = target_to_nds32(target); if (!is_nds32(nds32)) { - command_print(CMD_CTX, "current target isn't an Andes core"); + command_print(CMD, "current target isn't an Andes core"); return ERROR_FAIL; } - command_print(CMD_CTX, "CPUID: %s", target_name(target)); + command_print(CMD, "CPUID: %s", target_name(target)); return ERROR_OK; } @@ -679,18 +702,25 @@ static int jim_nds32_bulk_write(Jim_Interp *interp, int argc, Jim_Obj * const *a return e; uint32_t *data = malloc(count * sizeof(uint32_t)); + if (data == NULL) + return JIM_ERR; + jim_wide i; for (i = 0; i < count; i++) { jim_wide tmp; e = Jim_GetOpt_Wide(&goi, &tmp); - if (e != JIM_OK) + if (e != JIM_OK) { + free(data); return e; + } data[i] = (uint32_t)tmp; } /* all args must be consumed */ - if (goi.argc != 0) + if (goi.argc != 0) { + free(data); return JIM_ERR; + } struct target *target = Jim_CmdPrivData(goi.interp); int result; @@ -786,12 +816,12 @@ static int jim_nds32_bulk_read(Jim_Interp *interp, int argc, Jim_Obj * const *ar uint32_t *data = malloc(count * sizeof(uint32_t)); int result; result = target_read_buffer(target, address, count * 4, (uint8_t *)data); - char data_str[11]; + char data_str[12]; jim_wide i; Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); for (i = 0; i < count; i++) { - sprintf(data_str, "0x%08x ", data[i]); + sprintf(data_str, "0x%08" PRIx32 " ", data[i]); Jim_AppendStrings(interp, Jim_GetResult(interp), data_str, NULL); } @@ -814,7 +844,7 @@ static int jim_nds32_read_edm_sr(Jim_Interp *interp, int argc, Jim_Obj * const * } int e; - char *edm_sr_name; + const char *edm_sr_name; int edm_sr_name_len; e = Jim_GetOpt_String(&goi, &edm_sr_name, &edm_sr_name_len); if (e != JIM_OK) @@ -839,7 +869,7 @@ static int jim_nds32_read_edm_sr(Jim_Interp *interp, int argc, Jim_Obj * const * aice_read_debug_reg(aice, edm_sr_number, &edm_sr_value); - sprintf(data_str, "0x%08x", edm_sr_value); + sprintf(data_str, "0x%08" PRIx32, edm_sr_value); Jim_SetResult(interp, Jim_NewEmptyStringObj(interp)); Jim_AppendStrings(interp, Jim_GetResult(interp), data_str, NULL); @@ -860,7 +890,7 @@ static int jim_nds32_write_edm_sr(Jim_Interp *interp, int argc, Jim_Obj * const } int e; - char *edm_sr_name; + const char *edm_sr_name; int edm_sr_name_len; e = Jim_GetOpt_String(&goi, &edm_sr_name, &edm_sr_name_len); if (e != JIM_OK) @@ -1093,4 +1123,3 @@ const struct command_registration nds32_command_handlers[] = { }, COMMAND_REGISTRATION_DONE }; -