X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips_m4k.c;h=fff401c1621a63ae5d6753be8ff9bb8f6020c239;hp=909745aa648f81ec39056bc357ffe3f1f1704132;hb=aa7c449600d6f6d634f587de6091421a1a877af5;hpb=42ef503d37b18d907da16d26e99167566d5aabd1 diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index 909745aa64..fff401c162 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -23,6 +23,7 @@ #include "config.h" #endif +#include "breakpoints.h" #include "mips32.h" #include "mips_m4k.h" #include "mips32_dmaacc.h" @@ -32,23 +33,23 @@ /* cli handling */ /* forward declarations */ -int mips_m4k_poll(target_t *target); -int mips_m4k_halt(struct target_s *target); -int mips_m4k_soft_reset_halt(struct target_s *target); -int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution); -int mips_m4k_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints); -int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); -int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); -int mips_m4k_register_commands(struct command_context_s *cmd_ctx); -int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *target); -int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp); - -int mips_m4k_examine(struct target_s *target); -int mips_m4k_assert_reset(target_t *target); -int mips_m4k_deassert_reset(target_t *target); -int mips_m4k_checksum_memory(target_t *target, uint32_t address, uint32_t size, uint32_t *checksum); - -target_type_t mips_m4k_target = +int mips_m4k_poll(struct target *target); +int mips_m4k_halt(struct target *target); +int mips_m4k_soft_reset_halt(struct target *target); +int mips_m4k_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution); +int mips_m4k_step(struct target *target, int current, uint32_t address, int handle_breakpoints); +int mips_m4k_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); +int mips_m4k_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); +int mips_m4k_register_commands(struct command_context *cmd_ctx); +int mips_m4k_init_target(struct command_context *cmd_ctx, struct target *target); +int mips_m4k_target_create(struct target *target, Jim_Interp *interp); + +int mips_m4k_examine(struct target *target); +int mips_m4k_assert_reset(struct target *target); +int mips_m4k_deassert_reset(struct target *target); +int mips_m4k_checksum_memory(struct target *target, uint32_t address, uint32_t size, uint32_t *checksum); + +struct target_type mips_m4k_target = { .name = "mips_m4k", @@ -86,7 +87,7 @@ target_type_t mips_m4k_target = .examine = mips_m4k_examine, }; -int mips_m4k_examine_debug_reason(target_t *target) +int mips_m4k_examine_debug_reason(struct target *target) { uint32_t break_status; int retval; @@ -120,10 +121,10 @@ int mips_m4k_examine_debug_reason(target_t *target) return ERROR_OK; } -int mips_m4k_debug_entry(target_t *target) +int mips_m4k_debug_entry(struct target *target) { - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; uint32_t debug_reg; /* read debug register */ @@ -151,11 +152,11 @@ int mips_m4k_debug_entry(target_t *target) return ERROR_OK; } -int mips_m4k_poll(target_t *target) +int mips_m4k_poll(struct target *target) { int retval; - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl; /* read ejtag control reg */ @@ -212,10 +213,10 @@ int mips_m4k_poll(target_t *target) return ERROR_OK; } -int mips_m4k_halt(struct target_s *target) +int mips_m4k_halt(struct target *target) { - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; LOG_DEBUG("target->state: %s", target_state_name(target)); @@ -257,10 +258,10 @@ int mips_m4k_halt(struct target_s *target) return ERROR_OK; } -int mips_m4k_assert_reset(target_t *target) +int mips_m4k_assert_reset(struct target *target) { - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; LOG_DEBUG("target->state: %s", target_state_name(target)); @@ -319,7 +320,7 @@ int mips_m4k_assert_reset(target_t *target) return ERROR_OK; } -int mips_m4k_deassert_reset(target_t *target) +int mips_m4k_deassert_reset(struct target *target) { LOG_DEBUG("target->state: %s", target_state_name(target)); @@ -330,16 +331,16 @@ int mips_m4k_deassert_reset(target_t *target) return ERROR_OK; } -int mips_m4k_soft_reset_halt(struct target_s *target) +int mips_m4k_soft_reset_halt(struct target *target) { /* TODO */ return ERROR_OK; } -int mips_m4k_single_step_core(target_t *target) +int mips_m4k_single_step_core(struct target *target) { - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; /* configure single step mode */ mips_ejtag_config_step(ejtag_info, 1); @@ -355,11 +356,11 @@ int mips_m4k_single_step_core(target_t *target) return ERROR_OK; } -int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution) +int mips_m4k_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution) { - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; - breakpoint_t *breakpoint = NULL; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; + struct breakpoint *breakpoint = NULL; uint32_t resume_pc; if (target->state != TARGET_HALTED) @@ -426,12 +427,12 @@ int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int return ERROR_OK; } -int mips_m4k_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints) +int mips_m4k_step(struct target *target, int current, uint32_t address, int handle_breakpoints) { /* get pointers to arch-specific information */ - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; - breakpoint_t *breakpoint = NULL; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; + struct breakpoint *breakpoint = NULL; if (target->state != TARGET_HALTED) { @@ -478,9 +479,9 @@ int mips_m4k_step(struct target_s *target, int current, uint32_t address, int ha return ERROR_OK; } -void mips_m4k_enable_breakpoints(struct target_s *target) +void mips_m4k_enable_breakpoints(struct target *target) { - breakpoint_t *breakpoint = target->breakpoints; + struct breakpoint *breakpoint = target->breakpoints; /* set any pending breakpoints */ while (breakpoint) @@ -491,10 +492,10 @@ void mips_m4k_enable_breakpoints(struct target_s *target) } } -int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) +int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint) { - mips32_common_t *mips32 = target->arch_info; - mips32_comparator_t * comparator_list = mips32->inst_break_list; + struct mips32_common *mips32 = target->arch_info; + struct mips32_comparator * comparator_list = mips32->inst_break_list; int retval; if (breakpoint->set) @@ -582,11 +583,11 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) return ERROR_OK; } -int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) +int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *breakpoint) { /* get pointers to arch-specific information */ - mips32_common_t *mips32 = target->arch_info; - mips32_comparator_t * comparator_list = mips32->inst_break_list; + struct mips32_common *mips32 = target->arch_info; + struct mips32_comparator * comparator_list = mips32->inst_break_list; int retval; if (!breakpoint->set) @@ -657,9 +658,9 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) return ERROR_OK; } -int mips_m4k_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) +int mips_m4k_add_breakpoint(struct target *target, struct breakpoint *breakpoint) { - mips32_common_t *mips32 = target->arch_info; + struct mips32_common *mips32 = target->arch_info; if (breakpoint->type == BKPT_HARD) { @@ -677,10 +678,10 @@ int mips_m4k_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) return ERROR_OK; } -int mips_m4k_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint) +int mips_m4k_remove_breakpoint(struct target *target, struct breakpoint *breakpoint) { /* get pointers to arch-specific information */ - mips32_common_t *mips32 = target->arch_info; + struct mips32_common *mips32 = target->arch_info; if (target->state != TARGET_HALTED) { @@ -699,10 +700,10 @@ int mips_m4k_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint return ERROR_OK; } -int mips_m4k_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint) +int mips_m4k_set_watchpoint(struct target *target, struct watchpoint *watchpoint) { - mips32_common_t *mips32 = target->arch_info; - mips32_comparator_t * comparator_list = mips32->data_break_list; + struct mips32_common *mips32 = target->arch_info; + struct mips32_comparator * comparator_list = mips32->data_break_list; int wp_num = 0; /* * watchpoint enabled, ignore all byte lanes in value register @@ -767,11 +768,11 @@ int mips_m4k_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint) return ERROR_OK; } -int mips_m4k_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint) +int mips_m4k_unset_watchpoint(struct target *target, struct watchpoint *watchpoint) { /* get pointers to arch-specific information */ - mips32_common_t *mips32 = target->arch_info; - mips32_comparator_t * comparator_list = mips32->data_break_list; + struct mips32_common *mips32 = target->arch_info; + struct mips32_comparator * comparator_list = mips32->data_break_list; if (!watchpoint->set) { @@ -793,9 +794,9 @@ int mips_m4k_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint) return ERROR_OK; } -int mips_m4k_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint) +int mips_m4k_add_watchpoint(struct target *target, struct watchpoint *watchpoint) { - mips32_common_t *mips32 = target->arch_info; + struct mips32_common *mips32 = target->arch_info; if (mips32->num_data_bpoints_avail < 1) { @@ -809,10 +810,10 @@ int mips_m4k_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint) return ERROR_OK; } -int mips_m4k_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint) +int mips_m4k_remove_watchpoint(struct target *target, struct watchpoint *watchpoint) { /* get pointers to arch-specific information */ - mips32_common_t *mips32 = target->arch_info; + struct mips32_common *mips32 = target->arch_info; if (target->state != TARGET_HALTED) { @@ -830,9 +831,9 @@ int mips_m4k_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint return ERROR_OK; } -void mips_m4k_enable_watchpoints(struct target_s *target) +void mips_m4k_enable_watchpoints(struct target *target) { - watchpoint_t *watchpoint = target->watchpoints; + struct watchpoint *watchpoint = target->watchpoints; /* set any pending watchpoints */ while (watchpoint) @@ -843,10 +844,10 @@ void mips_m4k_enable_watchpoints(struct target_s *target) } } -int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +int mips_m4k_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count); @@ -875,10 +876,10 @@ int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t siz return ERROR_OK; } -int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +int mips_m4k_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count); @@ -902,7 +903,7 @@ int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t si return mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer); } -int mips_m4k_register_commands(struct command_context_s *cmd_ctx) +int mips_m4k_register_commands(struct command_context *cmd_ctx) { int retval; @@ -910,16 +911,16 @@ int mips_m4k_register_commands(struct command_context_s *cmd_ctx) return retval; } -int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *target) +int mips_m4k_init_target(struct command_context *cmd_ctx, struct target *target) { mips32_build_reg_cache(target); return ERROR_OK; } -int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, struct jtag_tap *tap) +int mips_m4k_init_arch_info(struct target *target, struct mips_m4k_common *mips_m4k, struct jtag_tap *tap) { - mips32_common_t *mips32 = &mips_m4k->mips32_common; + struct mips32_common *mips32 = &mips_m4k->mips32_common; mips_m4k->common_magic = MIPSM4K_COMMON_MAGIC; @@ -930,20 +931,20 @@ int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, struc return ERROR_OK; } -int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp) +int mips_m4k_target_create(struct target *target, Jim_Interp *interp) { - mips_m4k_common_t *mips_m4k = calloc(1,sizeof(mips_m4k_common_t)); + struct mips_m4k_common *mips_m4k = calloc(1,sizeof(struct mips_m4k_common)); mips_m4k_init_arch_info(target, mips_m4k, target->tap); return ERROR_OK; } -int mips_m4k_examine(struct target_s *target) +int mips_m4k_examine(struct target *target) { int retval; - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; uint32_t idcode = 0; if (!target_was_examined(target)) @@ -970,12 +971,12 @@ int mips_m4k_examine(struct target_s *target) return ERROR_OK; } -int mips_m4k_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer) +int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer) { return mips_m4k_write_memory(target, address, 4, count, buffer); } -int mips_m4k_checksum_memory(target_t *target, uint32_t address, uint32_t size, uint32_t *checksum) +int mips_m4k_checksum_memory(struct target *target, uint32_t address, uint32_t size, uint32_t *checksum) { return ERROR_FAIL; /* use bulk read method */ }