X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips_m4k.c;h=b84783b1ab0c2113c6b21fc220d53fe0405ed86e;hp=d3536d8fc8d2654ce61fbd595b1c61400b39d5b6;hb=bad3ee87ac170150a9a8a72c731aa631a1ad8cf5;hpb=79ca05b106ef92915c4e9288cbf34d5db1cf4cd2 diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index d3536d8fc8..b84783b1ab 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -32,7 +32,14 @@ #include "target_type.h" #include "register.h" -int mips_m4k_examine_debug_reason(struct target *target) +static void mips_m4k_enable_breakpoints(struct target *target); +static void mips_m4k_enable_watchpoints(struct target *target); +static int mips_m4k_set_breakpoint(struct target *target, + struct breakpoint *breakpoint); +static int mips_m4k_unset_breakpoint(struct target *target, + struct breakpoint *breakpoint); + +static int mips_m4k_examine_debug_reason(struct target *target) { uint32_t break_status; int retval; @@ -66,7 +73,7 @@ int mips_m4k_examine_debug_reason(struct target *target) return ERROR_OK; } -int mips_m4k_debug_entry(struct target *target) +static int mips_m4k_debug_entry(struct target *target) { struct mips32_common *mips32 = target_to_mips32(target); struct mips_ejtag *ejtag_info = &mips32->ejtag_info; @@ -104,7 +111,7 @@ int mips_m4k_debug_entry(struct target *target) return ERROR_OK; } -int mips_m4k_poll(struct target *target) +static int mips_m4k_poll(struct target *target) { int retval; struct mips32_common *mips32 = target_to_mips32(target); @@ -112,9 +119,10 @@ int mips_m4k_poll(struct target *target) uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl; /* read ejtag control reg */ - jtag_set_end_state(TAP_IDLE); - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL); - mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); + retval = mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); + if (retval != ERROR_OK) + return retval; /* clear this bit before handling polling * as after reset registers will read zero */ @@ -122,11 +130,12 @@ int mips_m4k_poll(struct target *target) { /* we have detected a reset, clear flag * otherwise ejtag will not work */ - jtag_set_end_state(TAP_IDLE); ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_ROCC; - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL); - mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); + retval = mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); + if (retval != ERROR_OK) + return retval; LOG_DEBUG("Reset Detected"); } @@ -135,8 +144,7 @@ int mips_m4k_poll(struct target *target) { if ((target->state == TARGET_RUNNING) || (target->state == TARGET_RESET)) { - jtag_set_end_state(TAP_IDLE); - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL); + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT); target->state = TARGET_HALTED; @@ -165,7 +173,7 @@ int mips_m4k_poll(struct target *target) return ERROR_OK; } -int mips_m4k_halt(struct target *target) +static int mips_m4k_halt(struct target *target) { struct mips32_common *mips32 = target_to_mips32(target); struct mips_ejtag *ejtag_info = &mips32->ejtag_info; @@ -210,7 +218,7 @@ int mips_m4k_halt(struct target *target) return ERROR_OK; } -int mips_m4k_assert_reset(struct target *target) +static int mips_m4k_assert_reset(struct target *target) { struct mips_m4k_common *mips_m4k = target_to_m4k(target); struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info; @@ -227,13 +235,11 @@ int mips_m4k_assert_reset(struct target *target) if (target->reset_halt) { /* use hardware to catch reset */ - jtag_set_end_state(TAP_IDLE); - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_EJTAGBOOT, NULL); + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_EJTAGBOOT); } else { - jtag_set_end_state(TAP_IDLE); - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL); + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT); } if (assert_srst) @@ -250,11 +256,26 @@ int mips_m4k_assert_reset(struct target *target) } else { + if (mips_m4k->is_pic32mx) + { + LOG_DEBUG("Using MTAP reset to reset processor..."); + + /* use microchip specific MTAP reset */ + mips_ejtag_set_instr(ejtag_info, MTAP_SW_MTAP); + mips_ejtag_set_instr(ejtag_info, MTAP_COMMAND); + + mips_ejtag_drscan_8_out(ejtag_info, MCHP_ASERT_RST); + mips_ejtag_drscan_8_out(ejtag_info, MCHP_DE_ASSERT_RST); + mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP); + } + else + { /* use ejtag reset - not supported by all cores */ uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST; LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor..."); - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL); - mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); + mips_ejtag_drscan_32_out(ejtag_info, ejtag_ctrl); + } } target->state = TARGET_RESET; @@ -272,7 +293,7 @@ int mips_m4k_assert_reset(struct target *target) return ERROR_OK; } -int mips_m4k_deassert_reset(struct target *target) +static int mips_m4k_deassert_reset(struct target *target) { LOG_DEBUG("target->state: %s", target_state_name(target)); @@ -283,13 +304,13 @@ int mips_m4k_deassert_reset(struct target *target) return ERROR_OK; } -int mips_m4k_soft_reset_halt(struct target *target) +static int mips_m4k_soft_reset_halt(struct target *target) { /* TODO */ return ERROR_OK; } -int mips_m4k_single_step_core(struct target *target) +static int mips_m4k_single_step_core(struct target *target) { struct mips32_common *mips32 = target_to_mips32(target); struct mips_ejtag *ejtag_info = &mips32->ejtag_info; @@ -308,7 +329,8 @@ int mips_m4k_single_step_core(struct target *target) return ERROR_OK; } -int mips_m4k_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution) +static int mips_m4k_resume(struct target *target, int current, + uint32_t address, int handle_breakpoints, int debug_execution) { struct mips32_common *mips32 = target_to_mips32(target); struct mips_ejtag *ejtag_info = &mips32->ejtag_info; @@ -383,7 +405,8 @@ int mips_m4k_resume(struct target *target, int current, uint32_t address, int ha return ERROR_OK; } -int mips_m4k_step(struct target *target, int current, uint32_t address, int handle_breakpoints) +static int mips_m4k_step(struct target *target, int current, + uint32_t address, int handle_breakpoints) { /* get pointers to arch-specific information */ struct mips32_common *mips32 = target_to_mips32(target); @@ -398,7 +421,11 @@ int mips_m4k_step(struct target *target, int current, uint32_t address, int hand /* current = 1: continue on current pc, otherwise continue at
*/ if (!current) + { buf_set_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32, address); + mips32->core_cache->reg_list[MIPS32_PC].dirty = 1; + mips32->core_cache->reg_list[MIPS32_PC].valid = 1; + } /* the front-end may request us not to handle breakpoints */ if (handle_breakpoints) { @@ -438,7 +465,7 @@ int mips_m4k_step(struct target *target, int current, uint32_t address, int hand return ERROR_OK; } -void mips_m4k_enable_breakpoints(struct target *target) +static void mips_m4k_enable_breakpoints(struct target *target) { struct breakpoint *breakpoint = target->breakpoints; @@ -451,7 +478,8 @@ void mips_m4k_enable_breakpoints(struct target *target) } } -int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint) +static int mips_m4k_set_breakpoint(struct target *target, + struct breakpoint *breakpoint) { struct mips32_common *mips32 = target_to_mips32(target); struct mips32_comparator * comparator_list = mips32->inst_break_list; @@ -473,7 +501,7 @@ int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint { LOG_ERROR("Can not find free FP Comparator(bpid: %d)", breakpoint->unique_id ); - return ERROR_FAIL; + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } breakpoint->set = bp_num + 1; comparator_list[bp_num].used = 1; @@ -543,7 +571,8 @@ int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint return ERROR_OK; } -int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *breakpoint) +static int mips_m4k_unset_breakpoint(struct target *target, + struct breakpoint *breakpoint) { /* get pointers to arch-specific information */ struct mips32_common *mips32 = target_to_mips32(target); @@ -587,6 +616,14 @@ int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *breakpoi { return retval; } + + /** + * target_read_memory() gets us data in _target_ endianess. + * If we want to use this data on the host for comparisons with some macros + * we must first transform it to _host_ endianess using target_buffer_get_u32(). + */ + current_instr = target_buffer_get_u32(target, (uint8_t *)¤t_instr); + if (current_instr == MIPS32_SDBBP) { if ((retval = target_write_memory(target, breakpoint->address, 4, 1, @@ -622,7 +659,7 @@ int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *breakpoi return ERROR_OK; } -int mips_m4k_add_breakpoint(struct target *target, struct breakpoint *breakpoint) +static int mips_m4k_add_breakpoint(struct target *target, struct breakpoint *breakpoint) { struct mips32_common *mips32 = target_to_mips32(target); @@ -637,12 +674,11 @@ int mips_m4k_add_breakpoint(struct target *target, struct breakpoint *breakpoint mips32->num_inst_bpoints_avail--; } - mips_m4k_set_breakpoint(target, breakpoint); - - return ERROR_OK; + return mips_m4k_set_breakpoint(target, breakpoint); } -int mips_m4k_remove_breakpoint(struct target *target, struct breakpoint *breakpoint) +static int mips_m4k_remove_breakpoint(struct target *target, + struct breakpoint *breakpoint) { /* get pointers to arch-specific information */ struct mips32_common *mips32 = target_to_mips32(target); @@ -664,7 +700,8 @@ int mips_m4k_remove_breakpoint(struct target *target, struct breakpoint *breakpo return ERROR_OK; } -int mips_m4k_set_watchpoint(struct target *target, struct watchpoint *watchpoint) +static int mips_m4k_set_watchpoint(struct target *target, + struct watchpoint *watchpoint) { struct mips32_common *mips32 = target_to_mips32(target); struct mips32_comparator *comparator_list = mips32->data_break_list; @@ -731,7 +768,8 @@ int mips_m4k_set_watchpoint(struct target *target, struct watchpoint *watchpoint return ERROR_OK; } -int mips_m4k_unset_watchpoint(struct target *target, struct watchpoint *watchpoint) +static int mips_m4k_unset_watchpoint(struct target *target, + struct watchpoint *watchpoint) { /* get pointers to arch-specific information */ struct mips32_common *mips32 = target_to_mips32(target); @@ -757,7 +795,7 @@ int mips_m4k_unset_watchpoint(struct target *target, struct watchpoint *watchpoi return ERROR_OK; } -int mips_m4k_add_watchpoint(struct target *target, struct watchpoint *watchpoint) +static int mips_m4k_add_watchpoint(struct target *target, struct watchpoint *watchpoint) { struct mips32_common *mips32 = target_to_mips32(target); @@ -773,7 +811,8 @@ int mips_m4k_add_watchpoint(struct target *target, struct watchpoint *watchpoint return ERROR_OK; } -int mips_m4k_remove_watchpoint(struct target *target, struct watchpoint *watchpoint) +static int mips_m4k_remove_watchpoint(struct target *target, + struct watchpoint *watchpoint) { /* get pointers to arch-specific information */ struct mips32_common *mips32 = target_to_mips32(target); @@ -794,7 +833,7 @@ int mips_m4k_remove_watchpoint(struct target *target, struct watchpoint *watchpo return ERROR_OK; } -void mips_m4k_enable_watchpoints(struct target *target) +static void mips_m4k_enable_watchpoints(struct target *target) { struct watchpoint *watchpoint = target->watchpoints; @@ -807,7 +846,8 @@ void mips_m4k_enable_watchpoints(struct target *target) } } -int mips_m4k_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +static int mips_m4k_read_memory(struct target *target, uint32_t address, + uint32_t size, uint32_t count, uint8_t *buffer) { struct mips32_common *mips32 = target_to_mips32(target); struct mips_ejtag *ejtag_info = &mips32->ejtag_info; @@ -836,11 +876,30 @@ int mips_m4k_read_memory(struct target *target, uint32_t address, uint32_t size, if (ERROR_OK != retval) return retval; + /* mips32_..._read_mem with size 4/2 returns uint32_t/uint16_t in host */ + /* endianness, but byte array should represent target endianness */ + uint32_t i, t32; + uint16_t t16; + for(i = 0; i < (count*size); i += size) + { + switch(size) + { + case 4: + t32 = le_to_h_u32(&buffer[i]); + target_buffer_set_u32(target,&buffer[i], t32); + break; + case 2: + t16 = le_to_h_u16(&buffer[i]); + target_buffer_set_u16(target,&buffer[i], t16); + break; + } + } + return ERROR_OK; } -int mips_m4k_write_memory(struct target *target, uint32_t address, uint32_t size, - uint32_t count, uint8_t *buffer) +static int mips_m4k_write_memory(struct target *target, uint32_t address, + uint32_t size, uint32_t count, const uint8_t *buffer) { struct mips32_common *mips32 = target_to_mips32(target); struct mips_ejtag *ejtag_info = &mips32->ejtag_info; @@ -861,24 +920,62 @@ int mips_m4k_write_memory(struct target *target, uint32_t address, uint32_t size if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u))) return ERROR_TARGET_UNALIGNED_ACCESS; + /* mips32_..._write_mem with size 4/2 requires uint32_t/uint16_t in host */ + /* endianness, but byte array represents target endianness */ + uint8_t * t = NULL; + t = malloc(count * sizeof(uint32_t)); + if (t == NULL) + { + LOG_ERROR("Out of memory"); + return ERROR_FAIL; + } + + uint32_t i, t32; + uint16_t t16; + for(i = 0; i < (count*size); i += size) + { + switch(size) + { + case 4: + t32 = target_buffer_get_u32(target,&buffer[i]); + h_u32_to_le(&t[i], t32); + break; + case 2: + t16 = target_buffer_get_u16(target,&buffer[i]); + h_u16_to_le(&t[i], t16); + break; + } + } + buffer = t; + /* if noDMA off, use DMAACC mode for memory write */ + int retval; if (ejtag_info->impcode & EJTAG_IMP_NODMA) - return mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer); + retval = mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer); else - return mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer); + retval = mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer); + + if (t != NULL) + free(t); + + if (ERROR_OK != retval) + return retval; + + return ERROR_OK; } -int mips_m4k_init_target(struct command_context *cmd_ctx, struct target *target) +static int mips_m4k_init_target(struct command_context *cmd_ctx, + struct target *target) { mips32_build_reg_cache(target); return ERROR_OK; } -int mips_m4k_init_arch_info(struct target *target, struct mips_m4k_common *mips_m4k, - struct jtag_tap *tap) +static int mips_m4k_init_arch_info(struct target *target, + struct mips_m4k_common *mips_m4k, struct jtag_tap *tap) { - struct mips32_common *mips32 = &mips_m4k->mips32_common; + struct mips32_common *mips32 = &mips_m4k->mips32; mips_m4k->common_magic = MIPSM4K_COMMON_MAGIC; @@ -889,7 +986,7 @@ int mips_m4k_init_arch_info(struct target *target, struct mips_m4k_common *mips_ return ERROR_OK; } -int mips_m4k_target_create(struct target *target, Jim_Interp *interp) +static int mips_m4k_target_create(struct target *target, Jim_Interp *interp) { struct mips_m4k_common *mips_m4k = calloc(1, sizeof(struct mips_m4k_common)); @@ -898,24 +995,27 @@ int mips_m4k_target_create(struct target *target, Jim_Interp *interp) return ERROR_OK; } -int mips_m4k_examine(struct target *target) +static int mips_m4k_examine(struct target *target) { int retval; - struct mips32_common *mips32 = target_to_mips32(target); - struct mips_ejtag *ejtag_info = &mips32->ejtag_info; + struct mips_m4k_common *mips_m4k = target_to_m4k(target); + struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info; uint32_t idcode = 0; if (!target_was_examined(target)) { - mips_ejtag_get_idcode(ejtag_info, &idcode); + retval = mips_ejtag_get_idcode(ejtag_info, &idcode); + if (retval != ERROR_OK) + return retval; ejtag_info->idcode = idcode; if (((idcode >> 1) & 0x7FF) == 0x29) { /* we are using a pic32mx so select ejtag port * as it is not selected by default */ - mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP, NULL); + mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP); LOG_DEBUG("PIC32MX Detected - using EJTAG Interface"); + mips_m4k->is_pic32mx = true; } } @@ -929,14 +1029,13 @@ int mips_m4k_examine(struct target *target) return ERROR_OK; } -int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, - uint32_t count, uint8_t *buffer) +static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, + uint32_t count, const uint8_t *buffer) { struct mips32_common *mips32 = target_to_mips32(target); struct mips_ejtag *ejtag_info = &mips32->ejtag_info; - struct working_area *source; int retval; - int write = 1; + int write_t = 1; LOG_DEBUG("address: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, count); @@ -950,27 +1049,48 @@ int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, if (address & 0x3u) return ERROR_TARGET_UNALIGNED_ACCESS; - /* Get memory for block write handler */ - retval = target_alloc_working_area(target, MIPS32_FASTDATA_HANDLER_SIZE, &source); - if (retval != ERROR_OK) + if (mips32->fast_data_area == NULL) { - LOG_WARNING("No working area available, falling back to non-bulk write"); - return mips_m4k_write_memory(target, address, 4, count, buffer); + /* Get memory for block write handler + * we preserve this area between calls and gain a speed increase + * of about 3kb/sec when writing flash + * this will be released/nulled by the system when the target is resumed or reset */ + retval = target_alloc_working_area(target, + MIPS32_FASTDATA_HANDLER_SIZE, + &mips32->fast_data_area); + if (retval != ERROR_OK) + { + LOG_WARNING("No working area available, falling back to non-bulk write"); + return mips_m4k_write_memory(target, address, 4, count, buffer); + } + + /* reset fastadata state so the algo get reloaded */ + ejtag_info->fast_access_save = -1; } - /* TAP data register is loaded LSB first (little endian) */ - if (target->endianness == TARGET_BIG_ENDIAN) + /* mips32_pracc_fastdata_xfer requires uint32_t in host endianness, */ + /* but byte array represents target endianness */ + uint8_t * t = NULL; + t = malloc(count * sizeof(uint32_t)); + if (t == NULL) { - uint32_t i, t32; - for(i = 0; i < (count * 4); i += 4) - { - t32 = be_to_h_u32((uint8_t *) &buffer[i]); - h_u32_to_le(&buffer[i], t32); - } + LOG_ERROR("Out of memory"); + return ERROR_FAIL; } - retval = mips32_pracc_fastdata_xfer(ejtag_info, source, write, address, - count, (uint32_t*) buffer); + uint32_t i, t32; + for(i = 0; i < (count*4); i += 4) + { + t32 = target_buffer_get_u32(target,&buffer[i]); + h_u32_to_le(&t[i], t32); + } + + retval = mips32_pracc_fastdata_xfer(ejtag_info, mips32->fast_data_area, write_t, address, + count, (uint32_t*) (void *)t); + + if (t != NULL) + free(t); + if (retval != ERROR_OK) { /* FASTDATA access failed, try normal memory write */ @@ -978,9 +1098,6 @@ int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, retval = mips_m4k_write_memory(target, address, 4, count, buffer); } - if (source) - target_free_working_area(target, source); - return retval; }