X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips_m4k.c;h=9a3d929c8c1d01fde3bbcb25727659978f0b5b5e;hp=1a10d5a979160a3fbd77c954db61105c83de569d;hb=9aad563d15da07fdd938014e65c1bbc38fcf3f6c;hpb=57260831dd0172c1dd7fe25e364e393612af0d00

diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index 1a10d5a979..9a3d929c8c 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -82,10 +82,9 @@ static int mips_m4k_debug_entry(struct target *target)
 {
 	struct mips32_common *mips32 = target_to_mips32(target);
 	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
-	uint32_t debug_reg;
 
-	/* read debug register */
-	mips_ejtag_read_debug(ejtag_info, &debug_reg);
+	/* make sure stepping disabled, SSt bit in CP0 debug register cleared */
+	mips_ejtag_config_step(ejtag_info, 0);
 
 	/* make sure break unit configured */
 	mips32_configure_break_unit(target);
@@ -93,12 +92,6 @@ static int mips_m4k_debug_entry(struct target *target)
 	/* attempt to find halt reason */
 	mips_m4k_examine_debug_reason(target);
 
-	/* clear single step if active */
-	if (debug_reg & EJTAG_DEBUG_DSS) {
-		/* stopped due to single step - clear step bit */
-		mips_ejtag_config_step(ejtag_info, 0);
-	}
-
 	mips32_save_context(target);
 
 	/* default to mips32 isa, it will be changed below if required */