X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips_m4k.c;h=83a2a7bd81fc86330d97df963ee06b74ef9700d0;hp=1a65c50b1f318e4fa0a783217ef02093f8d385ce;hb=3a550e5b5fe011e526b150a5d234b48e8e2aaad6;hpb=70738bd75dbc122e380ff3288542ac4e73700eed diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index 1a65c50b1f..83a2a7bd81 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -6,6 +6,9 @@ * * * Copyright (C) 2009 by David N. Claffey * * * + * Copyright (C) 2011 by Drasko DRASKOVIC * + * drasko.draskovic@gmail.com * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -32,62 +35,14 @@ #include "target_type.h" #include "register.h" -/* cli handling */ - -/* forward declarations */ -int mips_m4k_poll(struct target *target); -int mips_m4k_halt(struct target *target); -int mips_m4k_soft_reset_halt(struct target *target); -int mips_m4k_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution); -int mips_m4k_step(struct target *target, int current, uint32_t address, int handle_breakpoints); -int mips_m4k_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); -int mips_m4k_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); -int mips_m4k_init_target(struct command_context *cmd_ctx, struct target *target); -int mips_m4k_target_create(struct target *target, Jim_Interp *interp); - -int mips_m4k_examine(struct target *target); -int mips_m4k_assert_reset(struct target *target); -int mips_m4k_deassert_reset(struct target *target); -int mips_m4k_checksum_memory(struct target *target, uint32_t address, uint32_t size, uint32_t *checksum); - -struct target_type mips_m4k_target = -{ - .name = "mips_m4k", - - .poll = mips_m4k_poll, - .arch_state = mips32_arch_state, - - .target_request_data = NULL, - - .halt = mips_m4k_halt, - .resume = mips_m4k_resume, - .step = mips_m4k_step, - - .assert_reset = mips_m4k_assert_reset, - .deassert_reset = mips_m4k_deassert_reset, - .soft_reset_halt = mips_m4k_soft_reset_halt, - - .get_gdb_reg_list = mips32_get_gdb_reg_list, - - .read_memory = mips_m4k_read_memory, - .write_memory = mips_m4k_write_memory, - .bulk_write_memory = mips_m4k_bulk_write_memory, - .checksum_memory = mips_m4k_checksum_memory, - .blank_check_memory = NULL, - - .run_algorithm = mips32_run_algorithm, - - .add_breakpoint = mips_m4k_add_breakpoint, - .remove_breakpoint = mips_m4k_remove_breakpoint, - .add_watchpoint = mips_m4k_add_watchpoint, - .remove_watchpoint = mips_m4k_remove_watchpoint, - - .target_create = mips_m4k_target_create, - .init_target = mips_m4k_init_target, - .examine = mips_m4k_examine, -}; +static void mips_m4k_enable_breakpoints(struct target *target); +static void mips_m4k_enable_watchpoints(struct target *target); +static int mips_m4k_set_breakpoint(struct target *target, + struct breakpoint *breakpoint); +static int mips_m4k_unset_breakpoint(struct target *target, + struct breakpoint *breakpoint); -int mips_m4k_examine_debug_reason(struct target *target) +static int mips_m4k_examine_debug_reason(struct target *target) { uint32_t break_status; int retval; @@ -121,7 +76,7 @@ int mips_m4k_examine_debug_reason(struct target *target) return ERROR_OK; } -int mips_m4k_debug_entry(struct target *target) +static int mips_m4k_debug_entry(struct target *target) { struct mips32_common *mips32 = target_to_mips32(target); struct mips_ejtag *ejtag_info = &mips32->ejtag_info; @@ -148,13 +103,8 @@ int mips_m4k_debug_entry(struct target *target) /* default to mips32 isa, it will be changed below if required */ mips32->isa_mode = MIPS32_ISA_MIPS32; - if (ejtag_info->impcode & EJTAG_IMP_MIPS16) - { - if (buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32) & 0x01) - { - /* core is running mips16e isa */ - mips32->isa_mode = MIPS32_ISA_MIPS16E; - } + if (ejtag_info->impcode & EJTAG_IMP_MIPS16) { + mips32->isa_mode = buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 1); } LOG_DEBUG("entered debug state at PC 0x%" PRIx32 ", target->state: %s", @@ -164,7 +114,7 @@ int mips_m4k_debug_entry(struct target *target) return ERROR_OK; } -int mips_m4k_poll(struct target *target) +static int mips_m4k_poll(struct target *target) { int retval; struct mips32_common *mips32 = target_to_mips32(target); @@ -172,9 +122,10 @@ int mips_m4k_poll(struct target *target) uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl; /* read ejtag control reg */ - jtag_set_end_state(TAP_IDLE); - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL); - mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); + retval = mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); + if (retval != ERROR_OK) + return retval; /* clear this bit before handling polling * as after reset registers will read zero */ @@ -182,11 +133,12 @@ int mips_m4k_poll(struct target *target) { /* we have detected a reset, clear flag * otherwise ejtag will not work */ - jtag_set_end_state(TAP_IDLE); ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_ROCC; - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL); - mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); + retval = mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); + if (retval != ERROR_OK) + return retval; LOG_DEBUG("Reset Detected"); } @@ -195,8 +147,7 @@ int mips_m4k_poll(struct target *target) { if ((target->state == TARGET_RUNNING) || (target->state == TARGET_RESET)) { - jtag_set_end_state(TAP_IDLE); - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL); + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT); target->state = TARGET_HALTED; @@ -225,7 +176,7 @@ int mips_m4k_poll(struct target *target) return ERROR_OK; } -int mips_m4k_halt(struct target *target) +static int mips_m4k_halt(struct target *target) { struct mips32_common *mips32 = target_to_mips32(target); struct mips_ejtag *ejtag_info = &mips32->ejtag_info; @@ -270,41 +221,31 @@ int mips_m4k_halt(struct target *target) return ERROR_OK; } -int mips_m4k_assert_reset(struct target *target) +static int mips_m4k_assert_reset(struct target *target) { - struct mips32_common *mips32 = target_to_mips32(target); - struct mips_ejtag *ejtag_info = &mips32->ejtag_info; + struct mips_m4k_common *mips_m4k = target_to_m4k(target); + struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info; + int assert_srst = 1; LOG_DEBUG("target->state: %s", target_state_name(target)); enum reset_types jtag_reset_config = jtag_get_reset_config(); + if (!(jtag_reset_config & RESET_HAS_SRST)) - { - LOG_ERROR("Can't assert SRST"); - return ERROR_FAIL; - } + assert_srst = 0; if (target->reset_halt) { /* use hardware to catch reset */ - jtag_set_end_state(TAP_IDLE); - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_EJTAGBOOT, NULL); + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_EJTAGBOOT); } else { - jtag_set_end_state(TAP_IDLE); - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL); + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT); } - if (strcmp(target->variant, "ejtag_srst") == 0) - { - uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST; - LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor..."); - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL); - mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); - } - else + if (assert_srst) { /* here we should issue a srst only, but we may have to assert trst as well */ if (jtag_reset_config & RESET_SRST_PULLS_TRST) @@ -316,11 +257,34 @@ int mips_m4k_assert_reset(struct target *target) jtag_add_reset(0, 1); } } + else + { + if (mips_m4k->is_pic32mx) + { + LOG_DEBUG("Using MTAP reset to reset processor..."); + + /* use microchip specific MTAP reset */ + mips_ejtag_set_instr(ejtag_info, MTAP_SW_MTAP); + mips_ejtag_set_instr(ejtag_info, MTAP_COMMAND); + + mips_ejtag_drscan_8_out(ejtag_info, MCHP_ASERT_RST); + mips_ejtag_drscan_8_out(ejtag_info, MCHP_DE_ASSERT_RST); + mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP); + } + else + { + /* use ejtag reset - not supported by all cores */ + uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST; + LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor..."); + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); + mips_ejtag_drscan_32_out(ejtag_info, ejtag_ctrl); + } + } target->state = TARGET_RESET; jtag_add_sleep(50000); - register_cache_invalidate(mips32->core_cache); + register_cache_invalidate(mips_m4k->mips32.core_cache); if (target->reset_halt) { @@ -332,7 +296,7 @@ int mips_m4k_assert_reset(struct target *target) return ERROR_OK; } -int mips_m4k_deassert_reset(struct target *target) +static int mips_m4k_deassert_reset(struct target *target) { LOG_DEBUG("target->state: %s", target_state_name(target)); @@ -343,13 +307,13 @@ int mips_m4k_deassert_reset(struct target *target) return ERROR_OK; } -int mips_m4k_soft_reset_halt(struct target *target) +static int mips_m4k_soft_reset_halt(struct target *target) { /* TODO */ return ERROR_OK; } -int mips_m4k_single_step_core(struct target *target) +static int mips_m4k_single_step_core(struct target *target) { struct mips32_common *mips32 = target_to_mips32(target); struct mips_ejtag *ejtag_info = &mips32->ejtag_info; @@ -368,7 +332,8 @@ int mips_m4k_single_step_core(struct target *target) return ERROR_OK; } -int mips_m4k_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution) +static int mips_m4k_resume(struct target *target, int current, + uint32_t address, int handle_breakpoints, int debug_execution) { struct mips32_common *mips32 = target_to_mips32(target); struct mips_ejtag *ejtag_info = &mips32->ejtag_info; @@ -396,6 +361,10 @@ int mips_m4k_resume(struct target *target, int current, uint32_t address, int ha mips32->core_cache->reg_list[MIPS32_PC].valid = 1; } + if (ejtag_info->impcode & EJTAG_IMP_MIPS16) { + buf_set_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 1, mips32->isa_mode); + } + resume_pc = buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32); mips32_restore_context(target); @@ -439,7 +408,8 @@ int mips_m4k_resume(struct target *target, int current, uint32_t address, int ha return ERROR_OK; } -int mips_m4k_step(struct target *target, int current, uint32_t address, int handle_breakpoints) +static int mips_m4k_step(struct target *target, int current, + uint32_t address, int handle_breakpoints) { /* get pointers to arch-specific information */ struct mips32_common *mips32 = target_to_mips32(target); @@ -454,12 +424,19 @@ int mips_m4k_step(struct target *target, int current, uint32_t address, int hand /* current = 1: continue on current pc, otherwise continue at
*/ if (!current) + { buf_set_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32, address); + mips32->core_cache->reg_list[MIPS32_PC].dirty = 1; + mips32->core_cache->reg_list[MIPS32_PC].valid = 1; + } /* the front-end may request us not to handle breakpoints */ - if (handle_breakpoints) - if ((breakpoint = breakpoint_find(target, buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32)))) + if (handle_breakpoints) { + breakpoint = breakpoint_find(target, + buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32)); + if (breakpoint) mips_m4k_unset_breakpoint(target, breakpoint); + } /* restore context */ mips32_restore_context(target); @@ -491,7 +468,7 @@ int mips_m4k_step(struct target *target, int current, uint32_t address, int hand return ERROR_OK; } -void mips_m4k_enable_breakpoints(struct target *target) +static void mips_m4k_enable_breakpoints(struct target *target) { struct breakpoint *breakpoint = target->breakpoints; @@ -504,7 +481,8 @@ void mips_m4k_enable_breakpoints(struct target *target) } } -int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint) +static int mips_m4k_set_breakpoint(struct target *target, + struct breakpoint *breakpoint) { struct mips32_common *mips32 = target_to_mips32(target); struct mips32_comparator * comparator_list = mips32->inst_break_list; @@ -526,7 +504,7 @@ int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint { LOG_ERROR("Can not find free FP Comparator(bpid: %d)", breakpoint->unique_id ); - return ERROR_FAIL; + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } breakpoint->set = bp_num + 1; comparator_list[bp_num].used = 1; @@ -545,7 +523,8 @@ int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint { uint32_t verify = 0xffffffff; - if ((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK) + if ((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, + breakpoint->orig_instr)) != ERROR_OK) { return retval; } @@ -568,7 +547,8 @@ int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint { uint16_t verify = 0xffff; - if ((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK) + if ((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, + breakpoint->orig_instr)) != ERROR_OK) { return retval; } @@ -594,7 +574,8 @@ int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint return ERROR_OK; } -int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *breakpoint) +static int mips_m4k_unset_breakpoint(struct target *target, + struct breakpoint *breakpoint) { /* get pointers to arch-specific information */ struct mips32_common *mips32 = target_to_mips32(target); @@ -633,13 +614,23 @@ int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *breakpoi uint32_t current_instr; /* check that user program has not modified breakpoint instruction */ - if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (uint8_t*)¤t_instr)) != ERROR_OK) + if ((retval = target_read_memory(target, breakpoint->address, 4, 1, + (uint8_t*)¤t_instr)) != ERROR_OK) { return retval; } + + /** + * target_read_memory() gets us data in _target_ endianess. + * If we want to use this data on the host for comparisons with some macros + * we must first transform it to _host_ endianess using target_buffer_get_u32(). + */ + current_instr = target_buffer_get_u32(target, (uint8_t *)¤t_instr); + if (current_instr == MIPS32_SDBBP) { - if ((retval = target_write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK) + if ((retval = target_write_memory(target, breakpoint->address, 4, 1, + breakpoint->orig_instr)) != ERROR_OK) { return retval; } @@ -650,14 +641,16 @@ int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *breakpoi uint16_t current_instr; /* check that user program has not modified breakpoint instruction */ - if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (uint8_t*)¤t_instr)) != ERROR_OK) + if ((retval = target_read_memory(target, breakpoint->address, 2, 1, + (uint8_t*)¤t_instr)) != ERROR_OK) { return retval; } - + current_instr = target_buffer_get_u16(target, (uint8_t *)¤t_instr); if (current_instr == MIPS16_SDBBP) { - if ((retval = target_write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK) + if ((retval = target_write_memory(target, breakpoint->address, 2, 1, + breakpoint->orig_instr)) != ERROR_OK) { return retval; } @@ -669,7 +662,7 @@ int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *breakpoi return ERROR_OK; } -int mips_m4k_add_breakpoint(struct target *target, struct breakpoint *breakpoint) +static int mips_m4k_add_breakpoint(struct target *target, struct breakpoint *breakpoint) { struct mips32_common *mips32 = target_to_mips32(target); @@ -684,12 +677,11 @@ int mips_m4k_add_breakpoint(struct target *target, struct breakpoint *breakpoint mips32->num_inst_bpoints_avail--; } - mips_m4k_set_breakpoint(target, breakpoint); - - return ERROR_OK; + return mips_m4k_set_breakpoint(target, breakpoint); } -int mips_m4k_remove_breakpoint(struct target *target, struct breakpoint *breakpoint) +static int mips_m4k_remove_breakpoint(struct target *target, + struct breakpoint *breakpoint) { /* get pointers to arch-specific information */ struct mips32_common *mips32 = target_to_mips32(target); @@ -711,7 +703,8 @@ int mips_m4k_remove_breakpoint(struct target *target, struct breakpoint *breakpo return ERROR_OK; } -int mips_m4k_set_watchpoint(struct target *target, struct watchpoint *watchpoint) +static int mips_m4k_set_watchpoint(struct target *target, + struct watchpoint *watchpoint) { struct mips32_common *mips32 = target_to_mips32(target); struct mips32_comparator *comparator_list = mips32->data_break_list; @@ -778,7 +771,8 @@ int mips_m4k_set_watchpoint(struct target *target, struct watchpoint *watchpoint return ERROR_OK; } -int mips_m4k_unset_watchpoint(struct target *target, struct watchpoint *watchpoint) +static int mips_m4k_unset_watchpoint(struct target *target, + struct watchpoint *watchpoint) { /* get pointers to arch-specific information */ struct mips32_common *mips32 = target_to_mips32(target); @@ -804,7 +798,7 @@ int mips_m4k_unset_watchpoint(struct target *target, struct watchpoint *watchpoi return ERROR_OK; } -int mips_m4k_add_watchpoint(struct target *target, struct watchpoint *watchpoint) +static int mips_m4k_add_watchpoint(struct target *target, struct watchpoint *watchpoint) { struct mips32_common *mips32 = target_to_mips32(target); @@ -820,7 +814,8 @@ int mips_m4k_add_watchpoint(struct target *target, struct watchpoint *watchpoint return ERROR_OK; } -int mips_m4k_remove_watchpoint(struct target *target, struct watchpoint *watchpoint) +static int mips_m4k_remove_watchpoint(struct target *target, + struct watchpoint *watchpoint) { /* get pointers to arch-specific information */ struct mips32_common *mips32 = target_to_mips32(target); @@ -841,7 +836,7 @@ int mips_m4k_remove_watchpoint(struct target *target, struct watchpoint *watchpo return ERROR_OK; } -void mips_m4k_enable_watchpoints(struct target *target) +static void mips_m4k_enable_watchpoints(struct target *target) { struct watchpoint *watchpoint = target->watchpoints; @@ -854,7 +849,8 @@ void mips_m4k_enable_watchpoints(struct target *target) } } -int mips_m4k_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +static int mips_m4k_read_memory(struct target *target, uint32_t address, + uint32_t size, uint32_t count, uint8_t *buffer) { struct mips32_common *mips32 = target_to_mips32(target); struct mips_ejtag *ejtag_info = &mips32->ejtag_info; @@ -869,29 +865,64 @@ int mips_m4k_read_memory(struct target *target, uint32_t address, uint32_t size, /* sanitize arguments */ if (((size != 4) && (size != 2) && (size != 1)) || (count == 0) || !(buffer)) - return ERROR_INVALID_ARGUMENTS; + return ERROR_COMMAND_SYNTAX_ERROR; if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u))) return ERROR_TARGET_UNALIGNED_ACCESS; + /* since we don't know if buffer is aligned, we allocate new mem that is always aligned */ + void *t = NULL; + + if (size > 1) + { + t = malloc(count * size * sizeof(uint8_t)); + if (t == NULL) + { + LOG_ERROR("Out of memory"); + return ERROR_FAIL; + } + } + else + { + t = buffer; + } + /* if noDMA off, use DMAACC mode for memory read */ int retval; if (ejtag_info->impcode & EJTAG_IMP_NODMA) - retval = mips32_pracc_read_mem(ejtag_info, address, size, count, (void *)buffer); + retval = mips32_pracc_read_mem(ejtag_info, address, size, count, t); else - retval = mips32_dmaacc_read_mem(ejtag_info, address, size, count, (void *)buffer); - if (ERROR_OK != retval) - return retval; + retval = mips32_dmaacc_read_mem(ejtag_info, address, size, count, t); - return ERROR_OK; + /* mips32_..._read_mem with size 4/2 returns uint32_t/uint16_t in host */ + /* endianness, but byte array should represent target endianness */ + if (ERROR_OK == retval) + { + switch(size) + { + case 4: + target_buffer_set_u32_array(target,buffer,count,t); + break; + case 2: + target_buffer_set_u16_array(target,buffer,count,t); + break; + } + } + + if ((size > 1) && (t != NULL)) + free(t); + + return retval; } -int mips_m4k_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +static int mips_m4k_write_memory(struct target *target, uint32_t address, + uint32_t size, uint32_t count, const uint8_t *buffer) { struct mips32_common *mips32 = target_to_mips32(target); struct mips_ejtag *ejtag_info = &mips32->ejtag_info; - LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count); + LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", + address, size, count); if (target->state != TARGET_HALTED) { @@ -901,28 +932,64 @@ int mips_m4k_write_memory(struct target *target, uint32_t address, uint32_t size /* sanitize arguments */ if (((size != 4) && (size != 2) && (size != 1)) || (count == 0) || !(buffer)) - return ERROR_INVALID_ARGUMENTS; + return ERROR_COMMAND_SYNTAX_ERROR; if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u))) return ERROR_TARGET_UNALIGNED_ACCESS; + /** correct endianess if we have word or hword access */ + void *t = NULL; + if (size > 1) + { + /* mips32_..._write_mem with size 4/2 requires uint32_t/uint16_t in host */ + /* endianness, but byte array represents target endianness */ + t = malloc(count * size * sizeof(uint8_t)); + if (t == NULL) + { + LOG_ERROR("Out of memory"); + return ERROR_FAIL; + } + + switch(size) + { + case 4: + target_buffer_get_u32_array(target,buffer,count,(uint32_t*)t); + break; + case 2: + target_buffer_get_u16_array(target,buffer,count,(uint16_t*)t); + break; + } + buffer = t; + } + /* if noDMA off, use DMAACC mode for memory write */ + int retval; if (ejtag_info->impcode & EJTAG_IMP_NODMA) - return mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer); + retval = mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer); else - return mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer); + retval = mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer); + + if (t != NULL) + free(t); + + if (ERROR_OK != retval) + return retval; + + return ERROR_OK; } -int mips_m4k_init_target(struct command_context *cmd_ctx, struct target *target) +static int mips_m4k_init_target(struct command_context *cmd_ctx, + struct target *target) { mips32_build_reg_cache(target); return ERROR_OK; } -int mips_m4k_init_arch_info(struct target *target, struct mips_m4k_common *mips_m4k, struct jtag_tap *tap) +static int mips_m4k_init_arch_info(struct target *target, + struct mips_m4k_common *mips_m4k, struct jtag_tap *tap) { - struct mips32_common *mips32 = &mips_m4k->mips32_common; + struct mips32_common *mips32 = &mips_m4k->mips32; mips_m4k->common_magic = MIPSM4K_COMMON_MAGIC; @@ -933,7 +1000,7 @@ int mips_m4k_init_arch_info(struct target *target, struct mips_m4k_common *mips_ return ERROR_OK; } -int mips_m4k_target_create(struct target *target, Jim_Interp *interp) +static int mips_m4k_target_create(struct target *target, Jim_Interp *interp) { struct mips_m4k_common *mips_m4k = calloc(1, sizeof(struct mips_m4k_common)); @@ -942,24 +1009,27 @@ int mips_m4k_target_create(struct target *target, Jim_Interp *interp) return ERROR_OK; } -int mips_m4k_examine(struct target *target) +static int mips_m4k_examine(struct target *target) { int retval; - struct mips32_common *mips32 = target_to_mips32(target); - struct mips_ejtag *ejtag_info = &mips32->ejtag_info; + struct mips_m4k_common *mips_m4k = target_to_m4k(target); + struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info; uint32_t idcode = 0; if (!target_was_examined(target)) { - mips_ejtag_get_idcode(ejtag_info, &idcode); + retval = mips_ejtag_get_idcode(ejtag_info, &idcode); + if (retval != ERROR_OK) + return retval; ejtag_info->idcode = idcode; if (((idcode >> 1) & 0x7FF) == 0x29) { /* we are using a pic32mx so select ejtag port * as it is not selected by default */ - mips_ejtag_set_instr(ejtag_info, 0x05, NULL); + mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP); LOG_DEBUG("PIC32MX Detected - using EJTAG Interface"); + mips_m4k->is_pic32mx = true; } } @@ -973,15 +1043,15 @@ int mips_m4k_examine(struct target *target) return ERROR_OK; } -int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer) +static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, + uint32_t count, const uint8_t *buffer) { struct mips32_common *mips32 = target_to_mips32(target); struct mips_ejtag *ejtag_info = &mips32->ejtag_info; - struct working_area *source; int retval; - int write = 1; + int write_t = 1; - LOG_DEBUG("address: 0x%8.8x, count: 0x%8.8x", address, count); + LOG_DEBUG("address: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, count); if (target->state != TARGET_HALTED) { @@ -993,26 +1063,43 @@ int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, uint32_t if (address & 0x3u) return ERROR_TARGET_UNALIGNED_ACCESS; - /* Get memory for block write handler */ - retval = target_alloc_working_area(target, MIPS32_FASTDATA_HANDLER_SIZE, &source); - if (retval != ERROR_OK) + if (mips32->fast_data_area == NULL) { - LOG_WARNING("No working area available, falling back to non-bulk write"); - return mips_m4k_write_memory(target, address, 4, count, buffer); + /* Get memory for block write handler + * we preserve this area between calls and gain a speed increase + * of about 3kb/sec when writing flash + * this will be released/nulled by the system when the target is resumed or reset */ + retval = target_alloc_working_area(target, + MIPS32_FASTDATA_HANDLER_SIZE, + &mips32->fast_data_area); + if (retval != ERROR_OK) + { + LOG_WARNING("No working area available, falling back to non-bulk write"); + return mips_m4k_write_memory(target, address, 4, count, buffer); + } + + /* reset fastadata state so the algo get reloaded */ + ejtag_info->fast_access_save = -1; } - /* TAP data register is loaded LSB first (little endian) */ - if (target->endianness == TARGET_BIG_ENDIAN) + /* mips32_pracc_fastdata_xfer requires uint32_t in host endianness, */ + /* but byte array represents target endianness */ + uint32_t *t = NULL; + t = malloc(count * sizeof(uint32_t)); + if (t == NULL) { - uint32_t i, t32; - for(i = 0; i < (count * 4); i += 4) - { - t32 = be_to_h_u32((uint8_t *) &buffer[i]); - h_u32_to_le(&buffer[i], t32); - } + LOG_ERROR("Out of memory"); + return ERROR_FAIL; } - retval = mips32_pracc_fastdata_xfer(ejtag_info, source, write, address, count, (uint32_t*) buffer); + target_buffer_get_u32_array(target,buffer,count,t); + + retval = mips32_pracc_fastdata_xfer(ejtag_info, mips32->fast_data_area, write_t, address, + count, t); + + if (t != NULL) + free(t); + if (retval != ERROR_OK) { /* FASTDATA access failed, try normal memory write */ @@ -1020,13 +1107,144 @@ int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, uint32_t retval = mips_m4k_write_memory(target, address, 4, count, buffer); } - if (source) - target_free_working_area(target, source); - return retval; } -int mips_m4k_checksum_memory(struct target *target, uint32_t address, uint32_t size, uint32_t *checksum) +static int mips_m4k_verify_pointer(struct command_context *cmd_ctx, + struct mips_m4k_common *mips_m4k) { - return ERROR_FAIL; /* use bulk read method */ + if (mips_m4k->common_magic != MIPSM4K_COMMON_MAGIC) { + command_print(cmd_ctx, "target is not an MIPS_M4K"); + return ERROR_TARGET_INVALID; + } + return ERROR_OK; } + +COMMAND_HANDLER(mips_m4k_handle_cp0_command) +{ + int retval; + struct target *target = get_current_target(CMD_CTX); + struct mips_m4k_common *mips_m4k = target_to_m4k(target); + struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info; + + retval = mips_m4k_verify_pointer(CMD_CTX, mips_m4k); + if (retval != ERROR_OK) + return retval; + + if (target->state != TARGET_HALTED) + { + command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); + return ERROR_OK; + } + + /* two or more argument, access a single register/select (write if third argument is given) */ + if (CMD_ARGC < 2) + { + return ERROR_COMMAND_SYNTAX_ERROR; + } + else + { + uint32_t cp0_reg, cp0_sel; + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], cp0_reg); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], cp0_sel); + + if (CMD_ARGC == 2) + { + uint32_t value; + + if ((retval = mips32_cp0_read(ejtag_info, &value, cp0_reg, cp0_sel)) != ERROR_OK) + { + command_print(CMD_CTX, + "couldn't access reg %" PRIi32, + cp0_reg); + return ERROR_OK; + } + if ((retval = jtag_execute_queue()) != ERROR_OK) + { + return retval; + } + + command_print(CMD_CTX, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32, + cp0_reg, cp0_sel, value); + } + else if (CMD_ARGC == 3) + { + uint32_t value; + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], value); + if ((retval = mips32_cp0_write(ejtag_info, value, cp0_reg, cp0_sel)) != ERROR_OK) + { + command_print(CMD_CTX, + "couldn't access cp0 reg %" PRIi32 ", select %" PRIi32, + cp0_reg, cp0_sel); + return ERROR_OK; + } + command_print(CMD_CTX, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32, + cp0_reg, cp0_sel, value); + } + } + + return ERROR_OK; +} + +static const struct command_registration mips_m4k_exec_command_handlers[] = { + { + .name = "cp0", + .handler = mips_m4k_handle_cp0_command, + .mode = COMMAND_EXEC, + .usage = "regnum [value]", + .help = "display/modify cp0 register", + }, + COMMAND_REGISTRATION_DONE +}; + +const struct command_registration mips_m4k_command_handlers[] = { + { + .chain = mips32_command_handlers, + }, + { + .name = "mips_m4k", + .mode = COMMAND_ANY, + .help = "mips_m4k command group", + .usage = "", + .chain = mips_m4k_exec_command_handlers, + }, + COMMAND_REGISTRATION_DONE +}; + +struct target_type mips_m4k_target = +{ + .name = "mips_m4k", + + .poll = mips_m4k_poll, + .arch_state = mips32_arch_state, + + .target_request_data = NULL, + + .halt = mips_m4k_halt, + .resume = mips_m4k_resume, + .step = mips_m4k_step, + + .assert_reset = mips_m4k_assert_reset, + .deassert_reset = mips_m4k_deassert_reset, + .soft_reset_halt = mips_m4k_soft_reset_halt, + + .get_gdb_reg_list = mips32_get_gdb_reg_list, + + .read_memory = mips_m4k_read_memory, + .write_memory = mips_m4k_write_memory, + .bulk_write_memory = mips_m4k_bulk_write_memory, + .checksum_memory = mips32_checksum_memory, + .blank_check_memory = mips32_blank_check_memory, + + .run_algorithm = mips32_run_algorithm, + + .add_breakpoint = mips_m4k_add_breakpoint, + .remove_breakpoint = mips_m4k_remove_breakpoint, + .add_watchpoint = mips_m4k_add_watchpoint, + .remove_watchpoint = mips_m4k_remove_watchpoint, + + .commands = mips_m4k_command_handlers, + .target_create = mips_m4k_target_create, + .init_target = mips_m4k_init_target, + .examine = mips_m4k_examine, +};