X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips_m4k.c;h=6458c260c0f0fc81cb88b2eea5fd14ad9f1d6abe;hp=f99f1bf6526866936fee937ee0100aa32e9c2220;hb=86a7d813a165fda2816b8152342219b6c4ae2fc4;hpb=3c2eabd20f5182c53f0bfb0c6f2a9f2595434e87 diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index f99f1bf652..6458c260c0 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -146,9 +146,9 @@ int mips_m4k_debug_entry(target_t *target) mips32_save_context(target); - LOG_DEBUG("entered debug state at PC 0x%x, target->state: %s", + LOG_DEBUG("entered debug state at PC 0x%" PRIx32 ", target->state: %s", *(uint32_t*)(mips32->core_cache->reg_list[MIPS32_PC].value), - Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name); + target_state_name(target)); return ERROR_OK; } @@ -209,7 +209,7 @@ int mips_m4k_poll(target_t *target) target->state = TARGET_RUNNING; } -// LOG_DEBUG("ctrl=0x%08X", ejtag_ctrl); +// LOG_DEBUG("ctrl = 0x%08X", ejtag_ctrl); return ERROR_OK; } @@ -220,7 +220,7 @@ int mips_m4k_halt(struct target_s *target) mips_ejtag_t *ejtag_info = &mips32->ejtag_info; LOG_DEBUG("target->state: %s", - Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name); + target_state_name(target)); if (target->state == TARGET_HALTED) { @@ -265,7 +265,7 @@ int mips_m4k_assert_reset(target_t *target) mips_ejtag_t *ejtag_info = &mips32->ejtag_info; LOG_DEBUG("target->state: %s", - Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name); + target_state_name(target)); enum reset_types jtag_reset_config = jtag_get_reset_config(); if (!(jtag_reset_config & RESET_HAS_SRST)) @@ -314,7 +314,7 @@ int mips_m4k_assert_reset(target_t *target) if (target->reset_halt) { int retval; - if ((retval = target_halt(target))!=ERROR_OK) + if ((retval = target_halt(target)) != ERROR_OK) return retval; } @@ -324,7 +324,7 @@ int mips_m4k_assert_reset(target_t *target) int mips_m4k_deassert_reset(target_t *target) { LOG_DEBUG("target->state: %s", - Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name); + target_state_name(target)); /* deassert reset lines */ jtag_add_reset(0, 0); @@ -348,7 +348,7 @@ int mips_m4k_single_step_core(target_t *target) /* disable interrupts while stepping */ mips32_enable_interrupts(target, 0); - + /* exit debug mode */ mips_ejtag_exit_debug(ejtag_info); @@ -395,7 +395,7 @@ int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int /* Single step past breakpoint at current address */ if ((breakpoint = breakpoint_find(target, resume_pc))) { - LOG_DEBUG("unset breakpoint at 0x%8.8x", breakpoint->address); + LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address); mips_m4k_unset_breakpoint(target, breakpoint); mips_m4k_single_step_core(target); mips_m4k_set_breakpoint(target, breakpoint); @@ -404,7 +404,7 @@ int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int /* enable interrupts if we are running */ mips32_enable_interrupts(target, !debug_execution); - + /* exit debug mode */ mips_ejtag_exit_debug(ejtag_info); target->debug_reason = DBG_REASON_NOTHALTED; @@ -416,13 +416,13 @@ int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int { target->state = TARGET_RUNNING; target_call_event_callbacks(target, TARGET_EVENT_RESUMED); - LOG_DEBUG("target resumed at 0x%x", resume_pc); + LOG_DEBUG("target resumed at 0x%" PRIx32 "", resume_pc); } else { target->state = TARGET_DEBUG_RUNNING; target_call_event_callbacks(target, TARGET_EVENT_DEBUG_RESUMED); - LOG_DEBUG("target debug resumed at 0x%x", resume_pc); + LOG_DEBUG("target debug resumed at 0x%" PRIx32 "", resume_pc); } return ERROR_OK; @@ -462,7 +462,7 @@ int mips_m4k_step(struct target_s *target, int current, uint32_t address, int ha /* disable interrupts while stepping */ mips32_enable_interrupts(target, 0); - + /* exit debug mode */ mips_ejtag_exit_debug(ejtag_info); @@ -498,7 +498,7 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) mips32_common_t *mips32 = target->arch_info; mips32_comparator_t * comparator_list = mips32->inst_break_list; int retval; - + if (breakpoint->set) { LOG_WARNING("breakpoint already set"); @@ -509,11 +509,12 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { int bp_num = 0; - while(comparator_list[bp_num].used && (bp_num < mips32->num_inst_bpoints)) + while (comparator_list[bp_num].used && (bp_num < mips32->num_inst_bpoints)) bp_num++; if (bp_num >= mips32->num_inst_bpoints) { - LOG_DEBUG("ERROR Can not find free FP Comparator"); + LOG_DEBUG("ERROR Can not find free FP Comparator(bpid: %d)", + breakpoint->unique_id ); LOG_WARNING("ERROR Can not find free FP Comparator"); exit(-1); } @@ -523,15 +524,18 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) target_write_u32(target, comparator_list[bp_num].reg_address, comparator_list[bp_num].bp_value); target_write_u32(target, comparator_list[bp_num].reg_address + 0x08, 0x00000000); target_write_u32(target, comparator_list[bp_num].reg_address + 0x18, 1); - LOG_DEBUG("bp_num %i bp_value 0x%x", bp_num, comparator_list[bp_num].bp_value); + LOG_DEBUG("bpid: %d, bp_num %i bp_value 0x%" PRIx32 "", + breakpoint->unique_id, + bp_num, comparator_list[bp_num].bp_value); } else if (breakpoint->type == BKPT_SOFT) { + LOG_DEBUG("bpid: %d", breakpoint->unique_id ); if (breakpoint->length == 4) { uint32_t verify = 0xffffffff; - - if((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK) + + if ((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK) { return retval; } @@ -539,22 +543,22 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { return retval; } - + if ((retval = target_read_u32(target, breakpoint->address, &verify)) != ERROR_OK) { return retval; } if (verify != MIPS32_SDBBP) { - LOG_ERROR("Unable to set 32bit breakpoint at address %08x - check that memory is read/writable", breakpoint->address); + LOG_ERROR("Unable to set 32bit breakpoint at address %08" PRIx32 " - check that memory is read/writable", breakpoint->address); return ERROR_OK; } } else { uint16_t verify = 0xffff; - - if((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK) + + if ((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK) { return retval; } @@ -562,18 +566,18 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) { return retval; } - + if ((retval = target_read_u16(target, breakpoint->address, &verify)) != ERROR_OK) { return retval; } if (verify != MIPS16_SDBBP) { - LOG_ERROR("Unable to set 16bit breakpoint at address %08x - check that memory is read/writable", breakpoint->address); + LOG_ERROR("Unable to set 16bit breakpoint at address %08" PRIx32 " - check that memory is read/writable", breakpoint->address); return ERROR_OK; } } - + breakpoint->set = 20; /* Any nice value but 0 */ } @@ -586,7 +590,7 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) mips32_common_t *mips32 = target->arch_info; mips32_comparator_t * comparator_list = mips32->inst_break_list; int retval; - + if (!breakpoint->set) { LOG_WARNING("breakpoint not set"); @@ -598,20 +602,26 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) int bp_num = breakpoint->set - 1; if ((bp_num < 0) || (bp_num >= mips32->num_inst_bpoints)) { - LOG_DEBUG("Invalid FP Comparator number in breakpoint"); + LOG_DEBUG("Invalid FP Comparator number in breakpoint (bpid: %d)", + breakpoint->unique_id); return ERROR_OK; } + LOG_DEBUG("bpid: %d - releasing hw: %d", + breakpoint->unique_id, + bp_num ); comparator_list[bp_num].used = 0; comparator_list[bp_num].bp_value = 0; target_write_u32(target, comparator_list[bp_num].reg_address + 0x18, 0); + } else { /* restore original instruction (kept in target endianness) */ + LOG_DEBUG("bpid: %d", breakpoint->unique_id); if (breakpoint->length == 4) { uint32_t current_instr; - + /* check that user program has not modified breakpoint instruction */ if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (uint8_t*)¤t_instr)) != ERROR_OK) { @@ -619,7 +629,7 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) } if (current_instr == MIPS32_SDBBP) { - if((retval = target_write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK) + if ((retval = target_write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK) { return retval; } @@ -628,16 +638,16 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) else { uint16_t current_instr; - + /* check that user program has not modified breakpoint instruction */ if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (uint8_t*)¤t_instr)) != ERROR_OK) { return retval; } - + if (current_instr == MIPS16_SDBBP) { - if((retval = target_write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK) + if ((retval = target_write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK) { return retval; } @@ -660,9 +670,9 @@ int mips_m4k_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) LOG_INFO("no hardware breakpoint available"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } - + mips32->num_inst_bpoints_avail--; - } + } mips_m4k_set_breakpoint(target, breakpoint); @@ -693,25 +703,132 @@ int mips_m4k_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint int mips_m4k_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint) { - /* TODO */ + mips32_common_t *mips32 = target->arch_info; + mips32_comparator_t * comparator_list = mips32->data_break_list; + int wp_num = 0; + /* + * watchpoint enabled, ignore all byte lanes in value register + * and exclude both load and store accesses from watchpoint + * condition evaluation + */ + int enable = EJTAG_DBCn_NOSB | EJTAG_DBCn_NOLB | EJTAG_DBCn_BE | + (0xff << EJTAG_DBCn_BLM_SHIFT); + + if (watchpoint->set) + { + LOG_WARNING("watchpoint already set"); + return ERROR_OK; + } + + while(comparator_list[wp_num].used && (wp_num < mips32->num_data_bpoints)) + wp_num++; + if (wp_num >= mips32->num_data_bpoints) + { + LOG_DEBUG("ERROR Can not find free FP Comparator"); + LOG_WARNING("ERROR Can not find free FP Comparator"); + exit(-1); + } + + if (watchpoint->length != 4) + { + LOG_ERROR("Only watchpoints of length 4 are supported"); + return ERROR_TARGET_UNALIGNED_ACCESS; + } + + if (watchpoint->address % 4) + { + LOG_ERROR("Watchpoints address should be word aligned"); + return ERROR_TARGET_UNALIGNED_ACCESS; + } + + switch (watchpoint->rw) + { + case WPT_READ: + enable &= ~EJTAG_DBCn_NOLB; + break; + case WPT_WRITE: + enable &= ~EJTAG_DBCn_NOSB; + break; + case WPT_ACCESS: + enable &= ~(EJTAG_DBCn_NOLB | EJTAG_DBCn_NOSB); + break; + default: + LOG_ERROR("BUG: watchpoint->rw neither read, write nor access"); + } + + watchpoint->set = wp_num + 1; + comparator_list[wp_num].used = 1; + comparator_list[wp_num].bp_value = watchpoint->address; + target_write_u32(target, comparator_list[wp_num].reg_address, comparator_list[wp_num].bp_value); + target_write_u32(target, comparator_list[wp_num].reg_address + 0x08, 0x00000000); + target_write_u32(target, comparator_list[wp_num].reg_address + 0x10, 0x00000000); + target_write_u32(target, comparator_list[wp_num].reg_address + 0x18, enable); + target_write_u32(target, comparator_list[wp_num].reg_address + 0x20, 0); + LOG_DEBUG("wp_num %i bp_value 0x%" PRIx32 "", wp_num, comparator_list[wp_num].bp_value); + return ERROR_OK; } int mips_m4k_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint) { - /* TODO */ + /* get pointers to arch-specific information */ + mips32_common_t *mips32 = target->arch_info; + mips32_comparator_t * comparator_list = mips32->data_break_list; + + if (!watchpoint->set) + { + LOG_WARNING("watchpoint not set"); + return ERROR_OK; + } + + int wp_num = watchpoint->set - 1; + if ((wp_num < 0) || (wp_num >= mips32->num_data_bpoints)) + { + LOG_DEBUG("Invalid FP Comparator number in watchpoint"); + return ERROR_OK; + } + comparator_list[wp_num].used = 0; + comparator_list[wp_num].bp_value = 0; + target_write_u32(target, comparator_list[wp_num].reg_address + 0x18, 0); + watchpoint->set = 0; + return ERROR_OK; } int mips_m4k_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint) { - /* TODO */ + mips32_common_t *mips32 = target->arch_info; + + if (mips32->num_data_bpoints_avail < 1) + { + LOG_INFO("no hardware watchpoints available"); + return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; + } + + mips32->num_data_bpoints_avail--; + + mips_m4k_set_watchpoint(target, watchpoint); return ERROR_OK; } int mips_m4k_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint) { - /* TODO */ + /* get pointers to arch-specific information */ + mips32_common_t *mips32 = target->arch_info; + + if (target->state != TARGET_HALTED) + { + LOG_WARNING("target not halted"); + return ERROR_TARGET_NOT_HALTED; + } + + if (watchpoint->set) + { + mips_m4k_unset_watchpoint(target, watchpoint); + } + + mips32->num_data_bpoints_avail++; + return ERROR_OK; } @@ -733,7 +850,7 @@ int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t siz mips32_common_t *mips32 = target->arch_info; mips_ejtag_t *ejtag_info = &mips32->ejtag_info; - LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count); + LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count); if (target->state != TARGET_HALTED) { @@ -750,35 +867,13 @@ int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t siz /* if noDMA off, use DMAACC mode for memory read */ int retval; - if(ejtag_info->impcode & EJTAG_IMP_NODMA) + if (ejtag_info->impcode & EJTAG_IMP_NODMA) retval = mips32_pracc_read_mem(ejtag_info, address, size, count, (void *)buffer); else retval = mips32_dmaacc_read_mem(ejtag_info, address, size, count, (void *)buffer); if (ERROR_OK != retval) return retval; - /* TAP data register is loaded LSB first (little endian) */ - if (target->endianness == TARGET_BIG_ENDIAN) - { - uint32_t i, t32; - uint16_t t16; - - for(i = 0; i < (count*size); i += size) - { - switch(size) - { - case 4: - t32 = le_to_h_u32(&buffer[i]); - h_u32_to_be(&buffer[i], t32); - break; - case 2: - t16 = le_to_h_u16(&buffer[i]); - h_u16_to_be(&buffer[i], t16); - break; - } - } - } - return ERROR_OK; } @@ -787,7 +882,7 @@ int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t si mips32_common_t *mips32 = target->arch_info; mips_ejtag_t *ejtag_info = &mips32->ejtag_info; - LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count); + LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count); if (target->state != TARGET_HALTED) { @@ -802,30 +897,8 @@ int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t si if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u))) return ERROR_TARGET_UNALIGNED_ACCESS; - /* TAP data register is loaded LSB first (little endian) */ - if (target->endianness == TARGET_BIG_ENDIAN) - { - uint32_t i, t32; - uint16_t t16; - - for(i = 0; i < (count*size); i += size) - { - switch(size) - { - case 4: - t32 = be_to_h_u32(&buffer[i]); - h_u32_to_le(&buffer[i], t32); - break; - case 2: - t16 = be_to_h_u16(&buffer[i]); - h_u16_to_le(&buffer[i], t16); - break; - } - } - } - /* if noDMA off, use DMAACC mode for memory write */ - if(ejtag_info->impcode & EJTAG_IMP_NODMA) + if (ejtag_info->impcode & EJTAG_IMP_NODMA) return mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer); else return mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer); @@ -884,7 +957,7 @@ int mips_m4k_examine(struct target_s *target) { mips_ejtag_get_idcode(ejtag_info, &idcode); ejtag_info->idcode = idcode; - + if (((idcode >> 1) & 0x7FF) == 0x29) { /* we are using a pic32mx so select ejtag port