X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips_ejtag.h;h=760a7c5a8d4d3374b9e7ad046ed1e28e2f66060a;hp=164edd01071869b744b32430f8850d56870273bf;hb=f12ec221ab1d106d1a8927f338c5f8d847b2f7c1;hpb=b48a94f05da3a887f1978da01db77b79513d4aa9

diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index 164edd0107..760a7c5a8d 100644
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -17,7 +17,7 @@
  *   You should have received a copy of the GNU General Public License     *
  *   along with this program; if not, write to the                         *
  *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  ***************************************************************************/
 
 #ifndef MIPS_EJTAG
@@ -48,6 +48,8 @@
 /* microchip specific cmds */
 #define MCHP_ASERT_RST			0xd1
 #define MCHP_DE_ASSERT_RST		0xd0
+#define MCHP_ERASE				0xfc
+#define MCHP_STATUS				0x00
 
 /* ejtag control register bits ECR */
 #define EJTAG_CTRL_TOF			(1 << 1)
@@ -108,6 +110,7 @@
 #define EJTAG_DCR_DB			(1 << 17)
 #define EJTAG_DCR_IB			(1 << 16)
 #define EJTAG_DCR_INTE			(1 << 4)
+#define EJTAG_DCR_MP			(1 << 2)
 
 /* breakpoint support */
 #define EJTAG_IBS				0xFF301000
@@ -120,26 +123,46 @@
 #define	EJTAG_DBCn_BLM_SHIFT	4
 #define	EJTAG_DBCn_BE			(1 << 0)
 
-struct mips_ejtag
-{
+#define EJTAG_VERSION_20		0
+#define EJTAG_VERSION_25		1
+#define EJTAG_VERSION_26		2
+#define EJTAG_VERSION_31		3
+#define EJTAG_VERSION_41		4
+#define EJTAG_VERSION_51		5
+
+struct mips_ejtag {
 	struct jtag_tap *tap;
 	uint32_t impcode;
 	uint32_t idcode;
 	uint32_t ejtag_ctrl;
+	int fast_access_save;
+	uint32_t reg8;
+	uint32_t reg9;
+	unsigned scan_delay;
+	int mode;
+	unsigned int ejtag_version;
 };
 
-int mips_ejtag_set_instr(struct mips_ejtag *ejtag_info,
+void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info,
 		int new_instr);
 int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info);
 int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info);
-int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impcode);
 int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode);
+void mips_ejtag_add_scan_96(struct mips_ejtag *ejtag_info,
+			    uint32_t ctrl, uint32_t data, uint8_t *in_scan_buf);
+void mips_ejtag_drscan_32_out(struct mips_ejtag *ejtag_info, uint32_t data);
 int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data);
+void mips_ejtag_drscan_8_out(struct mips_ejtag *ejtag_info, uint8_t data);
 int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint32_t *data);
-int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write, uint32_t *data);
+int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_t *data);
 
 int mips_ejtag_init(struct mips_ejtag *ejtag_info);
 int mips_ejtag_config_step(struct mips_ejtag *ejtag_info, int enable_step);
-int mips_ejtag_read_debug(struct mips_ejtag *ejtag_info, uint32_t* debug_reg);
+
+static inline void mips_le_to_h_u32(jtag_callback_data_t arg)
+{
+	uint8_t *in = (uint8_t *)arg;
+	*((uint32_t *)arg) = le_to_h_u32(in);
+}
 
 #endif /* MIPS_EJTAG */