X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips_ejtag.c;h=3726191273b78ad1aafd1e47a1f5ecf79aa3f156;hp=f9eaef197e4798433ca1599d3c43db95c41496e2;hb=e3042a86ede3e50e3852268a4957c3c2d43f794f;hpb=83ab5ad2408c7d67ea490986f887c432f229e0ef diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c index f9eaef197e..3726191273 100644 --- a/src/target/mips_ejtag.c +++ b/src/target/mips_ejtag.c @@ -19,8 +19,9 @@ * You should have received a copy of the GNU General Public License * * along with this program; if not, write to the * * Free Software Foundation, Inc., * - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * ***************************************************************************/ + #ifdef HAVE_CONFIG_H #include "config.h" #endif @@ -35,8 +36,7 @@ void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr) tap = ejtag_info->tap; assert(tap != NULL); - if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (uint32_t)new_instr) - { + if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (uint32_t)new_instr) { struct scan_field field; uint8_t t[4]; @@ -52,45 +52,76 @@ void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr) int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode) { struct scan_field field; + uint8_t r[4]; mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IDCODE); field.num_bits = 32; field.out_value = NULL; - field.in_value = (void*)idcode; + field.in_value = r; jtag_add_dr_scan(ejtag_info->tap, 1, &field, TAP_IDLE); int retval; - if ((retval = jtag_execute_queue()) != ERROR_OK) - { + retval = jtag_execute_queue(); + if (retval != ERROR_OK) { LOG_ERROR("register read failed"); return retval; } + + *idcode = buf_get_u32(field.in_value, 0, 32); + return ERROR_OK; } static int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impcode) { struct scan_field field; + uint8_t r[4]; mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IMPCODE); field.num_bits = 32; field.out_value = NULL; - field.in_value = (void*)impcode; + field.in_value = r; jtag_add_dr_scan(ejtag_info->tap, 1, &field, TAP_IDLE); int retval; - if ((retval = jtag_execute_queue()) != ERROR_OK) - { + retval = jtag_execute_queue(); + if (retval != ERROR_OK) { LOG_ERROR("register read failed"); return retval; } + + *impcode = buf_get_u32(field.in_value, 0, 32); + return ERROR_OK; } +void mips_ejtag_add_scan_96(struct mips_ejtag *ejtag_info, uint32_t ctrl, uint32_t data, uint8_t *in_scan_buf) +{ + assert(ejtag_info->tap != NULL); + struct jtag_tap *tap = ejtag_info->tap; + + struct scan_field field; + uint8_t out_scan[12]; + + /* processor access "all" register 96 bit */ + field.num_bits = 96; + + field.out_value = out_scan; + buf_set_u32(out_scan, 0, 32, ctrl); + buf_set_u32(out_scan + 4, 0, 32, data); + buf_set_u32(out_scan + 8, 0, 32, 0); + + field.in_value = in_scan_buf; + + jtag_add_dr_scan(tap, 1, &field, TAP_IDLE); + + keep_alive(); +} + int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data) { struct jtag_tap *tap; @@ -108,8 +139,8 @@ int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data) jtag_add_dr_scan(tap, 1, &field, TAP_IDLE); - if ((retval = jtag_execute_queue()) != ERROR_OK) - { + retval = jtag_execute_queue(); + if (retval != ERROR_OK) { LOG_ERROR("register read failed"); return retval; } @@ -121,6 +152,24 @@ int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data) return ERROR_OK; } +void mips_ejtag_drscan_32_out(struct mips_ejtag *ejtag_info, uint32_t data) +{ + uint8_t t[4]; + struct jtag_tap *tap; + tap = ejtag_info->tap; + assert(tap != NULL); + + struct scan_field field; + + field.num_bits = 32; + field.out_value = t; + buf_set_u32(t, 0, field.num_bits, data); + + field.in_value = NULL; + + jtag_add_dr_scan(tap, 1, &field, TAP_IDLE); +} + int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint32_t *data) { struct jtag_tap *tap; @@ -138,66 +187,54 @@ int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint32_t *data) jtag_add_dr_scan(tap, 1, &field, TAP_IDLE); - if ((retval = jtag_execute_queue()) != ERROR_OK) - { + retval = jtag_execute_queue(); + if (retval != ERROR_OK) { LOG_ERROR("register read failed"); return retval; } *data = buf_get_u32(field.in_value, 0, 32); - keep_alive(); - return ERROR_OK; } -static int mips_ejtag_step_enable(struct mips_ejtag *ejtag_info) +void mips_ejtag_drscan_8_out(struct mips_ejtag *ejtag_info, uint8_t data) { - static const uint32_t code[] = { - MIPS32_MTC0(1,31,0), /* move $1 to COP0 DeSave */ - MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */ - MIPS32_ORI(1,1,0x0100), /* set SSt bit in debug reg */ - MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */ - MIPS32_B(NEG16(5)), - MIPS32_MFC0(1,31,0), /* move COP0 DeSave to $1 */ - }; - - mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \ - 0, NULL, 0, NULL, 1); + struct jtag_tap *tap; + tap = ejtag_info->tap; + assert(tap != NULL); - return ERROR_OK; -} + struct scan_field field; -static int mips_ejtag_step_disable(struct mips_ejtag *ejtag_info) -{ - static const uint32_t code[] = { - MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(1,0,15), /* sw $1,($15) */ - MIPS32_SW(2,0,15), /* sw $2,($15) */ - MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */ - MIPS32_LUI(2,0xFFFF), /* $2 = 0xfffffeff */ - MIPS32_ORI(2,2,0xFEFF), - MIPS32_AND(1,1,2), - MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */ - MIPS32_LW(2,0,15), - MIPS32_LW(1,0,15), - MIPS32_B(NEG16(13)), - MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */ - }; - - mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \ - 0, NULL, 0, NULL, 1); + field.num_bits = 8; + field.out_value = &data; + field.in_value = NULL; - return ERROR_OK; + jtag_add_dr_scan(tap, 1, &field, TAP_IDLE); } +/* Set (to enable) or clear (to disable stepping) the SSt bit (bit 8) in Cp0 Debug reg (reg 23, sel 0) */ int mips_ejtag_config_step(struct mips_ejtag *ejtag_info, int enable_step) { - if (enable_step) - return mips_ejtag_step_enable(ejtag_info); - return mips_ejtag_step_disable(ejtag_info); + struct pracc_queue_info ctx = {.max_code = 7}; + pracc_queue_init(&ctx); + if (ctx.retval != ERROR_OK) + goto exit; + + pracc_add(&ctx, 0, MIPS32_MFC0(8, 23, 0)); /* move COP0 Debug to $8 */ + pracc_add(&ctx, 0, MIPS32_ORI(8, 8, 0x0100)); /* set SSt bit in debug reg */ + if (!enable_step) + pracc_add(&ctx, 0, MIPS32_XORI(8, 8, 0x0100)); /* clear SSt bit in debug reg */ + + pracc_add(&ctx, 0, MIPS32_MTC0(8, 23, 0)); /* move $8 to COP0 Debug */ + pracc_add(&ctx, 0, MIPS32_LUI(8, UPPER16(ejtag_info->reg8))); /* restore upper 16 bits of $8 */ + pracc_add(&ctx, 0, MIPS32_B(NEG16((ctx.code_count + 1)))); /* jump to start */ + pracc_add(&ctx, 0, MIPS32_ORI(8, 8, LOWER16(ejtag_info->reg8))); /* restore lower 16 bits of $8 */ + + ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL); +exit: + pracc_queue_free(&ctx); + return ctx.retval; } int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info) @@ -213,8 +250,7 @@ int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info) ejtag_ctrl = ejtag_info->ejtag_ctrl; mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32 "", ejtag_ctrl); - if ((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0) - { + if ((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0) { LOG_ERROR("Failed to enter Debug Mode!"); return ERROR_FAIL; } @@ -224,43 +260,19 @@ int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info) int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info) { - uint32_t inst; - inst = MIPS32_DRET; + uint32_t instr = MIPS32_DRET; + struct pracc_queue_info ctx = {.max_code = 1, .pracc_list = &instr, .code_count = 1, .store_count = 0}; /* execute our dret instruction */ - mips32_pracc_exec(ejtag_info, 1, &inst, 0, NULL, 0, NULL, 0); - - return ERROR_OK; -} + ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL); -int mips_ejtag_read_debug(struct mips_ejtag *ejtag_info, uint32_t* debug_reg) -{ - /* read ejtag ECR */ - static const uint32_t code[] = { - MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(1,0,15), /* sw $1,($15) */ - MIPS32_SW(2,0,15), /* sw $2,($15) */ - MIPS32_LUI(1,UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $1 = MIPS32_PRACC_PARAM_OUT */ - MIPS32_ORI(1,1,LOWER16(MIPS32_PRACC_PARAM_OUT)), - MIPS32_MFC0(2,23,0), /* move COP0 Debug to $2 */ - MIPS32_SW(2,0,1), - MIPS32_LW(2,0,15), - MIPS32_LW(1,0,15), - MIPS32_B(NEG16(12)), - MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */ - }; - - mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \ - 0, NULL, 1, debug_reg, 1); - - return ERROR_OK; + /* pic32mx workaround, false pending at low core clock */ + jtag_add_sleep(1000); + return ctx.retval; } int mips_ejtag_init(struct mips_ejtag *ejtag_info) { - uint32_t ejtag_version; int retval; retval = mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode); @@ -269,22 +281,27 @@ int mips_ejtag_init(struct mips_ejtag *ejtag_info) LOG_DEBUG("impcode: 0x%8.8" PRIx32 "", ejtag_info->impcode); /* get ejtag version */ - ejtag_version = ((ejtag_info->impcode >> 29) & 0x07); + ejtag_info->ejtag_version = ((ejtag_info->impcode >> 29) & 0x07); - switch (ejtag_version) - { - case 0: + switch (ejtag_info->ejtag_version) { + case EJTAG_VERSION_20: LOG_DEBUG("EJTAG: Version 1 or 2.0 Detected"); break; - case 1: + case EJTAG_VERSION_25: LOG_DEBUG("EJTAG: Version 2.5 Detected"); break; - case 2: + case EJTAG_VERSION_26: LOG_DEBUG("EJTAG: Version 2.6 Detected"); break; - case 3: + case EJTAG_VERSION_31: LOG_DEBUG("EJTAG: Version 3.1 Detected"); break; + case EJTAG_VERSION_41: + LOG_DEBUG("EJTAG: Version 4.1 Detected"); + break; + case EJTAG_VERSION_51: + LOG_DEBUG("EJTAG: Version 5.1 Detected"); + break; default: LOG_DEBUG("EJTAG: Unknown Version Detected"); break; @@ -311,6 +328,7 @@ int mips_ejtag_init(struct mips_ejtag *ejtag_info) int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_t *data) { struct jtag_tap *tap; + tap = ejtag_info->tap; assert(tap != NULL); @@ -327,17 +345,18 @@ int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_ fields[1].num_bits = 32; fields[1].out_value = t; - if (write_t) - { + if (write_t) { fields[1].in_value = NULL; buf_set_u32(t, 0, 32, *data); - } - else - { - fields[1].in_value = (uint8_t *) data; - } + } else + fields[1].in_value = (void *) data; jtag_add_dr_scan(tap, 2, fields, TAP_IDLE); + + if (!write_t && data) + jtag_add_callback(mips_le_to_h_u32, + (jtag_callback_data_t) data); + keep_alive(); return ERROR_OK;