X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Ffa526.c;h=d9d5d43b51b22ce2c6c61025c16343e8133c1338;hp=98e969a88efe1a1a8eabc4ead96791497685f2cd;hb=1d9fba8c1488c3774c8bde737c2d658b1f525d09;hpb=996613522df32870b23e68d8d63e523908694598 diff --git a/src/target/fa526.c b/src/target/fa526.c index 98e969a88e..d9d5d43b51 100644 --- a/src/target/fa526.c +++ b/src/target/fa526.c @@ -33,18 +33,19 @@ #include "arm920t.h" #include "target_type.h" +#include "arm_opcodes.h" -static void fa526_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc) +static void fa526_change_to_arm(struct target *target, uint32_t *r0, uint32_t *pc) { LOG_ERROR("%s: there is no Thumb state on FA526", __func__); } -static void fa526_read_core_regs(target_t *target, +static void fa526_read_core_regs(struct target *target, uint32_t mask, uint32_t* core_regs[16]) { int i; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); - arm_jtag_t *jtag_info = &arm7_9->jtag_info; + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + struct arm_jtag *jtag_info = &arm7_9->jtag_info; /* STMIA r0-15, [r0] at debug speed * register values will start to appear on 4th DCLK @@ -66,12 +67,12 @@ static void fa526_read_core_regs(target_t *target, } } -static void fa526_read_core_regs_target_buffer(target_t *target, +static void fa526_read_core_regs_target_buffer(struct target *target, uint32_t mask, void* buffer, int size) { int i; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); - arm_jtag_t *jtag_info = &arm7_9->jtag_info; + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + struct arm_jtag *jtag_info = &arm7_9->jtag_info; int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0; uint32_t *buf_u32 = buffer; uint16_t *buf_u16 = buffer; @@ -108,10 +109,10 @@ static void fa526_read_core_regs_target_buffer(target_t *target, } } -static void fa526_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) +static void fa526_read_xpsr(struct target *target, uint32_t *xpsr, int spsr) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); - arm_jtag_t *jtag_info = &arm7_9->jtag_info; + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + struct arm_jtag *jtag_info = &arm7_9->jtag_info; /* MRS r0, cpsr */ arm9tdmi_clock_out(jtag_info, ARMV4_5_MRS(0, spsr & 1), 0, NULL, 0); @@ -133,10 +134,10 @@ static void fa526_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, xpsr, 0); } -static void fa526_write_xpsr(target_t *target, uint32_t xpsr, int spsr) +static void fa526_write_xpsr(struct target *target, uint32_t xpsr, int spsr) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); - arm_jtag_t *jtag_info = &arm7_9->jtag_info; + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + struct arm_jtag *jtag_info = &arm7_9->jtag_info; LOG_DEBUG("xpsr: %8.8" PRIx32 ", spsr: %i", xpsr, spsr); @@ -169,11 +170,11 @@ static void fa526_write_xpsr(target_t *target, uint32_t xpsr, int spsr) arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -static void fa526_write_xpsr_im8(target_t *target, +static void fa526_write_xpsr_im8(struct target *target, uint8_t xpsr_im, int rot, int spsr) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); - arm_jtag_t *jtag_info = &arm7_9->jtag_info; + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + struct arm_jtag *jtag_info = &arm7_9->jtag_info; LOG_DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr); @@ -196,12 +197,12 @@ static void fa526_write_xpsr_im8(target_t *target, } } -static void fa526_write_core_regs(target_t *target, +static void fa526_write_core_regs(struct target *target, uint32_t mask, uint32_t core_regs[16]) { int i; - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); - arm_jtag_t *jtag_info = &arm7_9->jtag_info; + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + struct arm_jtag *jtag_info = &arm7_9->jtag_info; /* LDMIA r0-15, [r0] at debug speed * register values will start to appear on 4th DCLK @@ -224,10 +225,10 @@ static void fa526_write_core_regs(target_t *target, arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -static void fa526_write_pc(target_t *target, uint32_t pc) +static void fa526_write_pc(struct target *target, uint32_t pc) { - struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); - arm_jtag_t *jtag_info = &arm7_9->jtag_info; + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + struct arm_jtag *jtag_info = &arm7_9->jtag_info; /* LDMIA r0-15, [r0] at debug speed * register values will start to appear on 4th DCLK @@ -250,18 +251,14 @@ static void fa526_write_pc(target_t *target, uint32_t pc) arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -static void fa526_branch_resume_thumb(target_t *target) +static void fa526_branch_resume_thumb(struct target *target) { LOG_ERROR("%s: there is no Thumb state on FA526", __func__); } -static int fa526_init_arch_info_2(target_t *target, - arm9tdmi_common_t *arm9tdmi, struct jtag_tap *tap) +static int fa526_init_arch_info_2(struct target *target, + struct arm7_9_common *arm7_9, struct jtag_tap *tap) { - arm7_9_common_t *arm7_9; - - arm7_9 = &arm9tdmi->arm7_9_common; - /* prepare JTAG information for the new target */ arm7_9->jtag_info.tap = tap; arm7_9->jtag_info.scann_size = 5; @@ -295,7 +292,6 @@ static int fa526_init_arch_info_2(target_t *target, arm7_9->post_debug_entry = NULL; arm7_9->pre_restore_context = NULL; - arm7_9->post_restore_context = NULL; /* initialize arch-specific breakpoint handling */ arm7_9->arm_bkpt = 0xdeeedeee; @@ -314,15 +310,13 @@ static int fa526_init_arch_info_2(target_t *target, return ERROR_OK; } -static int fa526_init_arch_info(target_t *target, +static int fa526_init_arch_info(struct target *target, struct arm920t_common *arm920t, struct jtag_tap *tap) { - arm9tdmi_common_t *arm9tdmi = &arm920t->arm9tdmi_common; - arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common; + struct arm7_9_common *arm7_9 = &arm920t->arm7_9_common; - /* initialize arm9tdmi specific info (including arm7_9 and armv4_5) - */ - fa526_init_arch_info_2(target, arm9tdmi, tap); + /* initialize arm7/arm9 specific info (including armv4_5) */ + fa526_init_arch_info_2(target, arm7_9, tap); arm920t->common_magic = ARM920T_COMMON_MAGIC; @@ -350,7 +344,7 @@ static int fa526_init_arch_info(target_t *target, return ERROR_OK; } -static int fa526_target_create(struct target_s *target, Jim_Interp *interp) +static int fa526_target_create(struct target *target, Jim_Interp *interp) { struct arm920t_common *arm920t = calloc(1,sizeof(struct arm920t_common)); @@ -358,7 +352,7 @@ static int fa526_target_create(struct target_s *target, Jim_Interp *interp) } /** Holds methods for FA526 targets. */ -target_type_t fa526_target = +struct target_type fa526_target = { .name = "fa526", @@ -375,13 +369,14 @@ target_type_t fa526_target = .deassert_reset = arm7_9_deassert_reset, .soft_reset_halt = arm920t_soft_reset_halt, - .get_gdb_reg_list = armv4_5_get_gdb_reg_list, + .get_gdb_reg_list = arm_get_gdb_reg_list, .read_memory = arm920t_read_memory, .write_memory = arm920t_write_memory, .bulk_write_memory = arm7_9_bulk_write_memory, - .checksum_memory = arm7_9_checksum_memory, - .blank_check_memory = arm7_9_blank_check_memory, + + .checksum_memory = arm_checksum_memory, + .blank_check_memory = arm_blank_check_memory, .run_algorithm = armv4_5_run_algorithm, @@ -390,8 +385,9 @@ target_type_t fa526_target = .add_watchpoint = arm7_9_add_watchpoint, .remove_watchpoint = arm7_9_remove_watchpoint, - .register_commands = arm920t_register_commands, + .commands = arm920t_command_handlers, .target_create = fa526_target_create, .init_target = arm9tdmi_init_target, - .examine = arm9tdmi_examine, + .examine = arm7_9_examine, + .check_reset = arm7_9_check_reset, };