X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fetm.c;h=fff94949470d74bfada734c0424233a11dd1b86f;hp=4e7f9172bf23a66b6a01557d4a2b2bc48f866a7d;hb=9abad965ab358c1d598f1354842967cad637b284;hpb=f74e2e033a2ad082e5bef67d0ddedd1db3f58300

diff --git a/src/target/etm.c b/src/target/etm.c
index 4e7f9172bf..fff9494947 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -21,12 +21,17 @@
 #include "config.h"
 #endif
 
-#include "armv4_5.h"
+#include "arm.h"
 #include "etm.h"
 #include "etb.h"
 #include "image.h"
 #include "arm_disassembler.h"
 #include "register.h"
+#include "etm_dummy.h"
+
+#if BUILD_OOCD_TRACE == 1
+#include "oocd_trace.h"
+#endif
 
 
 /*
@@ -613,13 +618,7 @@ static int etm_write_reg(struct reg *reg, uint32_t value)
 }
 
 
-/* ETM trace analysis functionality
- *
- */
-extern struct etm_capture_driver etm_dummy_capture_driver;
-#if BUILD_OOCD_TRACE == 1
-extern struct etm_capture_driver oocd_trace_capture_driver;
-#endif
+/* ETM trace analysis functionality */
 
 static struct etm_capture_driver *etm_capture_drivers[] =
 {
@@ -659,7 +658,7 @@ static int etm_read_instruction(struct etm_context *ctx, struct arm_instruction
 		return ERROR_TRACE_INSTRUCTION_UNAVAILABLE;
 	}
 
-	if (ctx->core_state == ARMV4_5_STATE_ARM)
+	if (ctx->core_state == ARM_STATE_ARM)
 	{
 		uint8_t buf[4];
 		if ((retval = image_read_section(ctx->image, section,
@@ -672,7 +671,7 @@ static int etm_read_instruction(struct etm_context *ctx, struct arm_instruction
 		opcode = target_buffer_get_u32(ctx->target, buf);
 		arm_evaluate_opcode(opcode, ctx->current_pc, instruction);
 	}
-	else if (ctx->core_state == ARMV4_5_STATE_THUMB)
+	else if (ctx->core_state == ARM_STATE_THUMB)
 	{
 		uint8_t buf[2];
 		if ((retval = image_read_section(ctx->image, section,
@@ -685,7 +684,7 @@ static int etm_read_instruction(struct etm_context *ctx, struct arm_instruction
 		opcode = target_buffer_get_u16(ctx->target, buf);
 		thumb_evaluate_opcode(opcode, ctx->current_pc, instruction);
 	}
-	else if (ctx->core_state == ARMV4_5_STATE_JAZELLE)
+	else if (ctx->core_state == ARM_STATE_JAZELLE)
 	{
 		LOG_ERROR("BUG: tracing of jazelle code not supported");
 		return ERROR_FAIL;
@@ -829,7 +828,7 @@ static int etmv1_branch_address(struct etm_context *ctx)
 	/* if a full address was output, we might have branched into Jazelle state */
 	if ((shift == 32) && (packet & 0x80))
 	{
-		ctx->core_state = ARMV4_5_STATE_JAZELLE;
+		ctx->core_state = ARM_STATE_JAZELLE;
 	}
 	else
 	{
@@ -837,12 +836,12 @@ static int etmv1_branch_address(struct etm_context *ctx)
 		 * encoded in bit 0 of the branch target address */
 		if (ctx->last_branch & 0x1)
 		{
-			ctx->core_state = ARMV4_5_STATE_THUMB;
+			ctx->core_state = ARM_STATE_THUMB;
 			ctx->last_branch &= ~0x1;
 		}
 		else
 		{
-			ctx->core_state = ARMV4_5_STATE_ARM;
+			ctx->core_state = ARM_STATE_ARM;
 			ctx->last_branch &= ~0x3;
 		}
 	}
@@ -1126,12 +1125,12 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_context *
 			}
 			else
 			{
-				next_pc += (ctx->core_state == ARMV4_5_STATE_ARM) ? 4 : 2;
+				next_pc += (ctx->core_state == ARM_STATE_ARM) ? 4 : 2;
 			}
 		}
 		else if (pipestat == STAT_IN)
 		{
-			next_pc += (ctx->core_state == ARMV4_5_STATE_ARM) ? 4 : 2;
+			next_pc += (ctx->core_state == ARM_STATE_ARM) ? 4 : 2;
 		}
 
 		if ((pipestat != STAT_TD) && (pipestat != STAT_WT))
@@ -1374,7 +1373,8 @@ COMMAND_HANDLER(handle_etm_config_command)
 	arm = target_to_arm(target);
 	if (!is_arm(arm)) {
 		command_print(CMD_CTX, "target '%s' is '%s'; not an ARM",
-				target->cmd_name, target_get_name(target));
+				target_name(target),
+				target_type_name(target));
 		return ERROR_FAIL;
 	}
 
@@ -1494,10 +1494,9 @@ COMMAND_HANDLER(handle_etm_config_command)
 	}
 
 	etm_ctx->target = target;
-	etm_ctx->trigger_percent = 50;
 	etm_ctx->trace_data = NULL;
 	etm_ctx->portmode = portmode;
-	etm_ctx->core_state = ARMV4_5_STATE_ARM;
+	etm_ctx->core_state = ARM_STATE_ARM;
 
 	arm->etm = etm_ctx;
 
@@ -1923,47 +1922,6 @@ COMMAND_HANDLER(handle_etm_load_command)
 	return ERROR_OK;
 }
 
-COMMAND_HANDLER(handle_etm_trigger_percent_command)
-{
-	struct target *target;
-	struct arm *arm;
-	struct etm_context *etm_ctx;
-
-	target = get_current_target(CMD_CTX);
-	arm = target_to_arm(target);
-	if (!is_arm(arm))
-	{
-		command_print(CMD_CTX, "ETM: current target isn't an ARM");
-		return ERROR_FAIL;
-	}
-
-	etm_ctx = arm->etm;
-	if (!etm_ctx)
-	{
-		command_print(CMD_CTX, "current target doesn't have an ETM configured");
-		return ERROR_FAIL;
-	}
-
-	if (CMD_ARGC > 0)
-	{
-		uint32_t new_value;
-		COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], new_value);
-
-		if ((new_value < 2) || (new_value > 100))
-		{
-			command_print(CMD_CTX, "valid settings are 2%% to 100%%");
-		}
-		else
-		{
-			etm_ctx->trigger_percent = new_value;
-		}
-	}
-
-	command_print(CMD_CTX, "%i percent of the tracebuffer reserved for after the trigger", ((int)(etm_ctx->trigger_percent)));
-
-	return ERROR_OK;
-}
-
 COMMAND_HANDLER(handle_etm_start_command)
 {
 	struct target *target;
@@ -2128,13 +2086,6 @@ static const struct command_registration etm_exec_command_handlers[] = {
 		.mode = COMMAND_EXEC,
 		.help = "display info about the current target's ETM",
 	},
-	{
-		.name = "trigger_percent",
-		.handler = &handle_etm_trigger_percent_command,
-		.mode = COMMAND_EXEC,
-		.help = "amount (<percent>) of trace buffer "
-			"to be filled after the trigger occured",
-	},
 	{
 		.name = "status",
 		.handler = &handle_etm_status_command,