X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fetm.c;h=4f4bf9a43066c2523dd90996a93d5d66d1afd599;hp=67dac06fadabb51ed5c16ee102fc113c3700908d;hb=5dcad2d34fc40659018da2cf75ceeacd3abea860;hpb=f85ad1e52a499bc98ae9d559157e8adbe8a5ad1f

diff --git a/src/target/etm.c b/src/target/etm.c
index 67dac06fad..4f4bf9a430 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -504,9 +504,8 @@ static int etm_read_reg_w_check(struct reg *reg,
 
 	LOG_DEBUG("%s (%u)", r->name, reg_addr);
 
-	jtag_set_end_state(TAP_IDLE);
-	arm_jtag_scann(etm_reg->jtag_info, 0x6);
-	arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL);
+	arm_jtag_scann(etm_reg->jtag_info, 0x6, TAP_IDLE);
+	arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
 
 	fields[0].num_bits = 32;
 	fields[0].out_value = reg->value;
@@ -515,29 +514,28 @@ static int etm_read_reg_w_check(struct reg *reg,
 	fields[0].check_mask = NULL;
 
 	fields[1].num_bits = 7;
-	fields[1].out_value = malloc(1);
-	buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
+	uint8_t temp1;
+	fields[1].out_value = &temp1;
+	buf_set_u32(&temp1, 0, 7, reg_addr);
 	fields[1].in_value = NULL;
 	fields[1].check_value = NULL;
 	fields[1].check_mask = NULL;
 
 	fields[2].num_bits = 1;
-	fields[2].out_value = malloc(1);
-	buf_set_u32(fields[2].out_value, 0, 1, 0);
+	uint8_t temp2;
+	fields[2].out_value = &temp2;
+	buf_set_u32(&temp2, 0, 1, 0);
 	fields[2].in_value = NULL;
 	fields[2].check_value = NULL;
 	fields[2].check_mask = NULL;
 
-	jtag_add_dr_scan(etm_reg->jtag_info->tap, 3, fields, jtag_get_end_state());
+	jtag_add_dr_scan(etm_reg->jtag_info->tap, 3, fields, TAP_IDLE);
 
 	fields[0].in_value = reg->value;
 	fields[0].check_value = check_value;
 	fields[0].check_mask = check_mask;
 
-	jtag_add_dr_scan_check(etm_reg->jtag_info->tap, 3, fields, jtag_get_end_state());
-
-	free(fields[1].out_value);
-	free(fields[2].out_value);
+	jtag_add_dr_scan_check(etm_reg->jtag_info->tap, 3, fields, TAP_IDLE);
 
 	return ERROR_OK;
 }
@@ -587,29 +585,28 @@ static int etm_write_reg(struct reg *reg, uint32_t value)
 
 	LOG_DEBUG("%s (%u): 0x%8.8" PRIx32 "", r->name, reg_addr, value);
 
-	jtag_set_end_state(TAP_IDLE);
-	arm_jtag_scann(etm_reg->jtag_info, 0x6);
-	arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL);
+	arm_jtag_scann(etm_reg->jtag_info, 0x6, TAP_IDLE);
+	arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
 
 	fields[0].num_bits = 32;
 	uint8_t tmp1[4];
 	fields[0].out_value = tmp1;
-	buf_set_u32(fields[0].out_value, 0, 32, value);
+	buf_set_u32(tmp1, 0, 32, value);
 	fields[0].in_value = NULL;
 
 	fields[1].num_bits = 7;
 	uint8_t tmp2;
 	fields[1].out_value = &tmp2;
-	buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
+	buf_set_u32(&tmp2, 0, 7, reg_addr);
 	fields[1].in_value = NULL;
 
 	fields[2].num_bits = 1;
 	uint8_t tmp3;
 	fields[2].out_value = &tmp3;
-	buf_set_u32(fields[2].out_value, 0, 1, 1);
+	buf_set_u32(&tmp3, 0, 1, 1);
 	fields[2].in_value = NULL;
 
-	jtag_add_dr_scan(etm_reg->jtag_info->tap, 3, fields, jtag_get_end_state());
+	jtag_add_dr_scan(etm_reg->jtag_info->tap, 3, fields, TAP_IDLE);
 
 	return ERROR_OK;
 }