X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fetb.c;h=21c375c35a1d28a35275710251116f016fb36178;hp=0e16b22bdecf3c62a43836040bc8e2db9d7ca68d;hb=a94748ec6da9bdc6e25a7f73bbea723b8b55fa33;hpb=f90d8fa45f2d4c9d4b7990f198b232ee55cbb4e1 diff --git a/src/target/etb.c b/src/target/etb.c index 0e16b22bde..21c375c35a 100644 --- a/src/target/etb.c +++ b/src/target/etb.c @@ -21,8 +21,9 @@ #include "config.h" #endif -#include "arm7_9_common.h" +#include "armv4_5.h" #include "etb.h" +#include "register.h" static char* etb_reg_list[] = @@ -40,13 +41,11 @@ static char* etb_reg_list[] = static int etb_reg_arch_type = -1; -static int etb_get_reg(reg_t *reg); +static int etb_get_reg(struct reg *reg); -static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); - -static int etb_set_instr(etb_t *etb, uint32_t new_instr) +static int etb_set_instr(struct etb *etb, uint32_t new_instr) { - jtag_tap_t *tap; + struct jtag_tap *tap; tap = etb->tap; if (tap == NULL) @@ -54,11 +53,11 @@ static int etb_set_instr(etb_t *etb, uint32_t new_instr) if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) { - scan_field_t field; + struct scan_field field; field.tap = tap; field.num_bits = tap->ir_length; - field.out_value = calloc(CEIL(field.num_bits, 8), 1); + field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1); buf_set_u32(field.out_value, 0, field.num_bits, new_instr); field.in_value = NULL; @@ -71,15 +70,15 @@ static int etb_set_instr(etb_t *etb, uint32_t new_instr) return ERROR_OK; } -static int etb_scann(etb_t *etb, uint32_t new_scan_chain) +static int etb_scann(struct etb *etb, uint32_t new_scan_chain) { if (etb->cur_scan_chain != new_scan_chain) { - scan_field_t field; + struct scan_field field; field.tap = etb->tap; field.num_bits = 5; - field.out_value = calloc(CEIL(field.num_bits, 8), 1); + field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1); buf_set_u32(field.out_value, 0, field.num_bits, new_scan_chain); field.in_value = NULL; @@ -96,11 +95,38 @@ static int etb_scann(etb_t *etb, uint32_t new_scan_chain) return ERROR_OK; } -reg_cache_t* etb_build_reg_cache(etb_t *etb) +static int etb_read_reg_w_check(struct reg *, uint8_t *, uint8_t *); +static int etb_set_reg_w_exec(struct reg *, uint8_t *); + +static int etb_read_reg(struct reg *reg) +{ + return etb_read_reg_w_check(reg, NULL, NULL); +} + +static int etb_get_reg(struct reg *reg) +{ + int retval; + + if ((retval = etb_read_reg(reg)) != ERROR_OK) + { + LOG_ERROR("BUG: error scheduling ETB register read"); + return retval; + } + + if ((retval = jtag_execute_queue()) != ERROR_OK) + { + LOG_ERROR("ETB register read failed"); + return retval; + } + + return ERROR_OK; +} + +struct reg_cache* etb_build_reg_cache(struct etb *etb) { - reg_cache_t *reg_cache = malloc(sizeof(reg_cache_t)); - reg_t *reg_list = NULL; - etb_reg_t *arch_info = NULL; + struct reg_cache *reg_cache = malloc(sizeof(struct reg_cache)); + struct reg *reg_list = NULL; + struct etb_reg *arch_info = NULL; int num_regs = 9; int i; @@ -109,8 +135,8 @@ reg_cache_t* etb_build_reg_cache(etb_t *etb) etb_reg_arch_type = register_reg_arch_type(etb_get_reg, etb_set_reg_w_exec); /* the actual registers are kept in two arrays */ - reg_list = calloc(num_regs, sizeof(reg_t)); - arch_info = calloc(num_regs, sizeof(etb_reg_t)); + reg_list = calloc(num_regs, sizeof(struct reg)); + arch_info = calloc(num_regs, sizeof(struct etb_reg)); /* fill in values for the reg cache */ reg_cache->name = "etb registers"; @@ -125,8 +151,6 @@ reg_cache_t* etb_build_reg_cache(etb_t *etb) reg_list[i].size = 32; reg_list[i].dirty = 0; reg_list[i].valid = 0; - reg_list[i].bitfield_desc = NULL; - reg_list[i].num_bitfields = 0; reg_list[i].value = calloc(1, 4); reg_list[i].arch_info = &arch_info[i]; reg_list[i].arch_type = etb_reg_arch_type; @@ -138,36 +162,17 @@ reg_cache_t* etb_build_reg_cache(etb_t *etb) return reg_cache; } -static int etb_get_reg(reg_t *reg) -{ - int retval; - - if ((retval = etb_read_reg(reg)) != ERROR_OK) - { - LOG_ERROR("BUG: error scheduling etm register read"); - return retval; - } - - if ((retval = jtag_execute_queue()) != ERROR_OK) - { - LOG_ERROR("register read failed"); - return retval; - } - - return ERROR_OK; -} - - static void etb_getbuf(jtag_callback_data_t arg) { - uint8_t *in = (uint8_t *)arg; + uint8_t *in = (uint8_t *)arg; + *((uint32_t *)in) = buf_get_u32(in, 0, 32); } -static int etb_read_ram(etb_t *etb, uint32_t *data, int num_frames) +static int etb_read_ram(struct etb *etb, uint32_t *data, int num_frames) { - scan_field_t fields[3]; + struct scan_field fields[3]; int i; jtag_set_end_state(TAP_IDLE); @@ -218,11 +223,12 @@ static int etb_read_ram(etb_t *etb, uint32_t *data, int num_frames) return ERROR_OK; } -int etb_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask) +static int etb_read_reg_w_check(struct reg *reg, + uint8_t* check_value, uint8_t* check_mask) { - etb_reg_t *etb_reg = reg->arch_info; + struct etb_reg *etb_reg = reg->arch_info; uint8_t reg_addr = etb_reg->addr & 0x7f; - scan_field_t fields[3]; + struct scan_field fields[3]; LOG_DEBUG("%i", (int)(etb_reg->addr)); @@ -271,18 +277,15 @@ int etb_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask) return ERROR_OK; } -int etb_read_reg(reg_t *reg) -{ - return etb_read_reg_w_check(reg, NULL, NULL); -} +static int etb_write_reg(struct reg *, uint32_t); -int etb_set_reg(reg_t *reg, uint32_t value) +static int etb_set_reg(struct reg *reg, uint32_t value) { int retval; if ((retval = etb_write_reg(reg, value)) != ERROR_OK) { - LOG_ERROR("BUG: error scheduling etm register write"); + LOG_ERROR("BUG: error scheduling ETB register write"); return retval; } @@ -293,7 +296,7 @@ int etb_set_reg(reg_t *reg, uint32_t value) return ERROR_OK; } -int etb_set_reg_w_exec(reg_t *reg, uint8_t *buf) +static int etb_set_reg_w_exec(struct reg *reg, uint8_t *buf) { int retval; @@ -301,17 +304,17 @@ int etb_set_reg_w_exec(reg_t *reg, uint8_t *buf) if ((retval = jtag_execute_queue()) != ERROR_OK) { - LOG_ERROR("register write failed"); + LOG_ERROR("ETB: register write failed"); return retval; } return ERROR_OK; } -int etb_write_reg(reg_t *reg, uint32_t value) +static int etb_write_reg(struct reg *reg, uint32_t value) { - etb_reg_t *etb_reg = reg->arch_info; + struct etb_reg *etb_reg = reg->arch_info; uint8_t reg_addr = etb_reg->addr & 0x7f; - scan_field_t fields[3]; + struct scan_field fields[3]; LOG_DEBUG("%i: 0x%8.8" PRIx32 "", (int)(etb_reg->addr), value); @@ -345,28 +348,11 @@ int etb_write_reg(reg_t *reg, uint32_t value) return ERROR_OK; } -int etb_store_reg(reg_t *reg) +COMMAND_HANDLER(handle_etb_config_command) { - return etb_write_reg(reg, buf_get_u32(reg->value, 0, reg->size)); -} - -static int etb_register_commands(struct command_context_s *cmd_ctx) -{ - command_t *etb_cmd; - - etb_cmd = register_command(cmd_ctx, NULL, "etb", NULL, COMMAND_ANY, "Embedded Trace Buffer"); - - register_command(cmd_ctx, etb_cmd, "config", handle_etb_config_command, COMMAND_CONFIG, NULL); - - return ERROR_OK; -} - -static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) -{ - target_t *target; - jtag_tap_t *tap; - armv4_5_common_t *armv4_5; - arm7_9_common_t *arm7_9; + struct target *target; + struct jtag_tap *tap; + struct arm *arm; if (argc != 2) { @@ -377,28 +363,29 @@ static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cm if (!target) { - LOG_ERROR("target '%s' not defined", args[0]); + LOG_ERROR("ETB: target '%s' not defined", args[0]); return ERROR_FAIL; } - if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK) + arm = target_to_arm(target); + if (!is_arm(arm)) { - command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target"); + command_print(cmd_ctx, "ETB: '%s' isn't an ARM", args[0]); return ERROR_FAIL; } - tap = jtag_tap_by_string(args[1] ); + tap = jtag_tap_by_string(args[1]); if (tap == NULL) { - command_print(cmd_ctx, "Tap: %s does not exist", args[1] ); + command_print(cmd_ctx, "ETB: TAP %s does not exist", args[1]); return ERROR_FAIL; } - if (arm7_9->etm_ctx) + if (arm->etm) { - etb_t *etb = malloc(sizeof(etb_t)); + struct etb *etb = malloc(sizeof(struct etb)); - arm7_9->etm_ctx->capture_driver_priv = etb; + arm->etm->capture_driver_priv = etb; etb->tap = tap; etb->cur_scan_chain = 0xffffffff; @@ -408,16 +395,28 @@ static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cm } else { - LOG_ERROR("target has no ETM defined, ETB left unconfigured"); + LOG_ERROR("ETM: target has no ETM defined, ETB left unconfigured"); return ERROR_FAIL; } return ERROR_OK; } -static int etb_init(etm_context_t *etm_ctx) +static int etb_register_commands(struct command_context *cmd_ctx) { - etb_t *etb = etm_ctx->capture_driver_priv; + struct command *etb_cmd = register_command(cmd_ctx, NULL, "etb", + NULL, COMMAND_ANY, "Embedded Trace Buffer"); + + register_command(cmd_ctx, etb_cmd, "config", + handle_etb_config_command, COMMAND_CONFIG, + NULL); + + return ERROR_OK; +} + +static int etb_init(struct etm_context *etm_ctx) +{ + struct etb *etb = etm_ctx->capture_driver_priv; etb->etm_ctx = etm_ctx; @@ -432,64 +431,61 @@ static int etb_init(etm_context_t *etm_ctx) return ERROR_OK; } -static trace_status_t etb_status(etm_context_t *etm_ctx) +static trace_status_t etb_status(struct etm_context *etm_ctx) { - etb_t *etb = etm_ctx->capture_driver_priv; + struct etb *etb = etm_ctx->capture_driver_priv; + struct reg *control = &etb->reg_cache->reg_list[ETB_CTRL]; + struct reg *status = &etb->reg_cache->reg_list[ETB_STATUS]; + trace_status_t retval = 0; + int etb_timeout = 100; etb->etm_ctx = etm_ctx; - /* if tracing is currently idle, return this information */ - if (etm_ctx->capture_status == TRACE_IDLE) - { - return etm_ctx->capture_status; - } - else if (etm_ctx->capture_status & TRACE_RUNNING) - { - reg_t *etb_status_reg = &etb->reg_cache->reg_list[ETB_STATUS]; - int etb_timeout = 100; + /* read control and status registers */ + etb_read_reg(control); + etb_read_reg(status); + jtag_execute_queue(); - /* trace is running, check the ETB status flags */ - etb_get_reg(etb_status_reg); + /* See if it's (still) active */ + retval = buf_get_u32(control->value, 0, 1) ? TRACE_RUNNING : TRACE_IDLE; - /* check Full bit to identify an overflow */ - if (buf_get_u32(etb_status_reg->value, 0, 1) == 1) - etm_ctx->capture_status |= TRACE_OVERFLOWED; + /* check Full bit to identify wraparound/overflow */ + if (buf_get_u32(status->value, 0, 1) == 1) + retval |= TRACE_OVERFLOWED; - /* check Triggered bit to identify trigger condition */ - if (buf_get_u32(etb_status_reg->value, 1, 1) == 1) - etm_ctx->capture_status |= TRACE_TRIGGERED; + /* check Triggered bit to identify trigger condition */ + if (buf_get_u32(status->value, 1, 1) == 1) + retval |= TRACE_TRIGGERED; - /* check AcqComp to identify trace completion */ - if (buf_get_u32(etb_status_reg->value, 2, 1) == 1) - { - while (etb_timeout-- && (buf_get_u32(etb_status_reg->value, 3, 1) == 0)) - { - /* wait for data formatter idle */ - etb_get_reg(etb_status_reg); - } + /* check AcqComp to see if trigger counter dropped to zero */ + if (buf_get_u32(status->value, 2, 1) == 1) { + /* wait for DFEmpty */ + while (etb_timeout-- && buf_get_u32(status->value, 3, 1) == 0) + etb_get_reg(status); - if (etb_timeout == 0) - { - LOG_ERROR("AcqComp set but DFEmpty won't go high, ETB status: 0x%" PRIx32 "", - buf_get_u32(etb_status_reg->value, 0, etb_status_reg->size)); - } + if (etb_timeout == 0) + LOG_ERROR("ETB: DFEmpty won't go high, status 0x%02x", + (unsigned) buf_get_u32(status->value, 0, 4)); - if (!(etm_ctx->capture_status && TRACE_TRIGGERED)) - { - LOG_ERROR("trace completed, but no trigger condition detected"); - } + if (!(etm_ctx->capture_status & TRACE_TRIGGERED)) + LOG_WARNING("ETB: trace complete without triggering?"); - etm_ctx->capture_status &= ~TRACE_RUNNING; - etm_ctx->capture_status |= TRACE_COMPLETED; - } + retval |= TRACE_COMPLETED; } - return etm_ctx->capture_status; + /* NOTE: using a trigger is optional; and at least ETB11 has a mode + * where it can ignore the trigger counter. + */ + + /* update recorded state */ + etm_ctx->capture_status = retval; + + return retval; } -static int etb_read_trace(etm_context_t *etm_ctx) +static int etb_read_trace(struct etm_context *etm_ctx) { - etb_t *etb = etm_ctx->capture_driver_priv; + struct etb *etb = etm_ctx->capture_driver_priv; int first_frame = 0; int num_frames = etb->ram_depth; uint32_t *trace_data = NULL; @@ -530,7 +526,7 @@ static int etb_read_trace(etm_context_t *etm_ctx) else etm_ctx->trace_depth = num_frames; - etm_ctx->trace_data = malloc(sizeof(etmv1_trace_data_t) * etm_ctx->trace_depth); + etm_ctx->trace_data = malloc(sizeof(struct etmv1_trace_data) * etm_ctx->trace_depth); for (i = 0, j = 0; i < num_frames; i++) { @@ -637,9 +633,9 @@ static int etb_read_trace(etm_context_t *etm_ctx) return ERROR_OK; } -static int etb_start_capture(etm_context_t *etm_ctx) +static int etb_start_capture(struct etm_context *etm_ctx) { - etb_t *etb = etm_ctx->capture_driver_priv; + struct etb *etb = etm_ctx->capture_driver_priv; uint32_t etb_ctrl_value = 0x1; uint32_t trigger_count; @@ -653,8 +649,10 @@ static int etb_start_capture(etm_context_t *etm_ctx) etb_ctrl_value |= 0x2; } - if ((etm_ctx->portmode & ETM_PORT_MODE_MASK) == ETM_PORT_MUXED) + if ((etm_ctx->portmode & ETM_PORT_MODE_MASK) == ETM_PORT_MUXED) { + LOG_ERROR("ETB: can't run in multiplexed mode"); return ERROR_ETM_PORTMODE_NOT_SUPPORTED; + } trigger_count = (etb->ram_depth * etm_ctx->trigger_percent) / 100; @@ -669,10 +667,10 @@ static int etb_start_capture(etm_context_t *etm_ctx) return ERROR_OK; } -static int etb_stop_capture(etm_context_t *etm_ctx) +static int etb_stop_capture(struct etm_context *etm_ctx) { - etb_t *etb = etm_ctx->capture_driver_priv; - reg_t *etb_ctrl_reg = &etb->reg_cache->reg_list[ETB_CTRL]; + struct etb *etb = etm_ctx->capture_driver_priv; + struct reg *etb_ctrl_reg = &etb->reg_cache->reg_list[ETB_CTRL]; etb_write_reg(etb_ctrl_reg, 0x0); jtag_execute_queue(); @@ -683,7 +681,7 @@ static int etb_stop_capture(etm_context_t *etm_ctx) return ERROR_OK; } -etm_capture_driver_t etb_capture_driver = +struct etm_capture_driver etb_capture_driver = { .name = "etb", .register_commands = etb_register_commands,