X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fembeddedice.h;h=58a5fa9efa6c08dfb85d1f07a0b1f24a7b8b0df5;hp=c27a1b5d6138ec8d4c930d789159cbcf61a2c842;hb=374127301ec1d72033b9d573b72c7abdfd61990d;hpb=42ef503d37b18d907da16d26e99167566d5aabd1 diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h index c27a1b5d61..58a5fa9efa 100644 --- a/src/target/embeddedice.h +++ b/src/target/embeddedice.h @@ -23,13 +23,13 @@ * Free Software Foundation, Inc., * * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * ***************************************************************************/ + #ifndef EMBEDDED_ICE_H #define EMBEDDED_ICE_H #include "arm7_9_common.h" -enum -{ +enum { EICE_DBG_CTRL = 0, EICE_DBG_STAT = 1, EICE_COMMS_CTRL = 2, @@ -49,8 +49,7 @@ enum EICE_VEC_CATCH = 16 }; -enum -{ +enum { EICE_DBG_CONTROL_ICEDIS = 5, EICE_DBG_CONTROL_MONEN = 4, EICE_DBG_CONTROL_INTDIS = 2, @@ -58,8 +57,7 @@ enum EICE_DBG_CONTROL_DBGACK = 0, }; -enum -{ +enum { EICE_DBG_STATUS_IJBIT = 5, EICE_DBG_STATUS_ITBIT = 4, EICE_DBG_STATUS_SYSCOMP = 3, @@ -68,8 +66,7 @@ enum EICE_DBG_STATUS_DBGACK = 0 }; -enum -{ +enum { EICE_W_CTRL_ENABLE = 0x100, EICE_W_CTRL_RANGE = 0x80, EICE_W_CTRL_CHAIN = 0x40, @@ -81,57 +78,50 @@ enum EICE_W_CTRL_nRW = 0x1 }; -enum -{ +enum { EICE_COMM_CTRL_WBIT = 1, EICE_COMM_CTRL_RBIT = 0 }; -typedef struct embeddedice_reg_s -{ +struct embeddedice_reg { int addr; - arm_jtag_t *jtag_info; -} embeddedice_reg_t; + struct arm_jtag *jtag_info; +}; -reg_cache_t* embeddedice_build_reg_cache(target_t *target, - arm7_9_common_t *arm7_9); +struct reg_cache *embeddedice_build_reg_cache(struct target *target, + struct arm7_9_common *arm7_9); -int embeddedice_setup(target_t *target); +int embeddedice_setup(struct target *target); -int embeddedice_read_reg(reg_t *reg); -int embeddedice_read_reg_w_check(reg_t *reg, - uint8_t* check_value, uint8_t* check_mask); +int embeddedice_read_reg(struct reg *reg); +int embeddedice_read_reg_w_check(struct reg *reg, + uint8_t *check_value, uint8_t *check_mask); -void embeddedice_write_reg(reg_t *reg, uint32_t value); -void embeddedice_store_reg(reg_t *reg); +void embeddedice_write_reg(struct reg *reg, uint32_t value); +void embeddedice_store_reg(struct reg *reg); -void embeddedice_set_reg(reg_t *reg, uint32_t value); -int embeddedice_set_reg_w_exec(reg_t *reg, uint8_t *buf); +void embeddedice_set_reg(struct reg *reg, uint32_t value); -int embeddedice_receive(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size); -int embeddedice_send(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size); +int embeddedice_receive(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size); +int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size); -int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, uint32_t timeout); +int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeout); -/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of - * embeddedice_write_reg +/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be + * this faster version of embeddedice_write_reg */ -static __inline__ void embeddedice_write_reg_inner(struct jtag_tap *tap, int reg_addr, uint32_t value) +static inline void embeddedice_write_reg_inner(struct jtag_tap *tap, int reg_addr, uint32_t value) { - static const int embeddedice_num_bits[]={32,5,1}; - uint32_t values[3]; - - values[0]=value; - values[1]=reg_addr; - values[2]=1; - - jtag_add_dr_out(tap, - 3, - embeddedice_num_bits, - values, - jtag_get_end_state()); + static const int embeddedice_num_bits[] = {32, 6}; + uint32_t values[2]; + + values[0] = value; + values[1] = (1 << 5) | reg_addr; + + jtag_add_dr_out(tap, 2, embeddedice_num_bits, values, TAP_IDLE); } -void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count); +void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, const uint8_t *buffer, + int little, int count); #endif /* EMBEDDED_ICE_H */