X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fembeddedice.h;h=08e42c9267f263f5c500629c1d46684246238d55;hp=62c5b78b728568e89f0470760e608d5b84b1b1b9;hb=6a2fd7cad507ef24a7dc4ce3c5f8b5351dd12656;hpb=76ebc78358ef94dcf5d64c8738e6dd4bb1371b2c diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h index 62c5b78b72..08e42c9267 100644 --- a/src/target/embeddedice.h +++ b/src/target/embeddedice.h @@ -2,6 +2,12 @@ * Copyright (C) 2005, 2006 by Dominic Rath * * Dominic.Rath@gmx.de * * * + * Copyright (C) 2007,2008 Øyvind Harboe * + * oyvind.harboe@zylin.com * + * * + * Copyright (C) 2008 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -20,9 +26,6 @@ #ifndef EMBEDDED_ICE_H #define EMBEDDED_ICE_H -#include "target.h" -#include "register.h" -#include "arm_jtag.h" #include "arm7_9_common.h" enum @@ -49,7 +52,7 @@ enum enum { EICE_DBG_CONTROL_ICEDIS = 5, - EICE_DBG_CONTROL_MONEN = 4, + EICE_DBG_CONTROL_MONEN = 4, EICE_DBG_CONTROL_INTDIS = 2, EICE_DBG_CONTROL_DBGRQ = 1, EICE_DBG_CONTROL_DBGACK = 0, @@ -91,27 +94,36 @@ typedef struct embeddedice_reg_s } embeddedice_reg_t; extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9); +extern int embeddedice_setup(target_t *target); extern int embeddedice_read_reg(reg_t *reg); -extern int embeddedice_write_reg(reg_t *reg, u32 value); -extern int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask); -extern int embeddedice_store_reg(reg_t *reg); -extern int embeddedice_set_reg(reg_t *reg, u32 value); -extern int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf); -extern int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size); -extern int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size); -extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout); +extern void embeddedice_write_reg(reg_t *reg, uint32_t value); +extern int embeddedice_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask); +extern void embeddedice_store_reg(reg_t *reg); +extern void embeddedice_set_reg(reg_t *reg, uint32_t value); +extern int embeddedice_set_reg_w_exec(reg_t *reg, uint8_t *buf); +extern int embeddedice_receive(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size); +extern int embeddedice_send(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size); +extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, uint32_t timeout); -/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of +/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of * embeddedice_write_reg */ -static __inline void embeddedice_write_reg_inner(reg_t *reg, u32 value) +static __inline__ void embeddedice_write_reg_inner(jtag_tap_t *tap, int reg_addr, uint32_t value) { - embeddedice_reg_t *ice_reg = reg->arch_info; - u8 reg_addr = ice_reg->addr & 0x1f; - jtag_add_shift(TAP_SD, TAP_PD, 32, value); - jtag_add_shift(TAP_SD, TAP_PD, 5, reg_addr); - jtag_add_shift(TAP_SD, TAP_RTI, 1, 1); + static const int embeddedice_num_bits[]={32,5,1}; + uint32_t values[3]; + + values[0]=value; + values[1]=reg_addr; + values[2]=1; + + jtag_add_dr_out(tap, + 3, + embeddedice_num_bits, + values, + jtag_get_end_state()); } +void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, uint8_t *buffer, int little, int count); #endif /* EMBEDDED_ICE_H */