X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fcortex_swjdp.h;h=99dae691782fa917600b8c710297679183f407d4;hp=093f2ed54d4d672f84024e0458d22d9ed8a2c9d3;hb=e66f9aaba94e232f87c725f2fce98cfb3f92679f;hpb=09883194f86725f4eae7e6db9eabcf6b3d1511de

diff --git a/src/target/cortex_swjdp.h b/src/target/cortex_swjdp.h
index 093f2ed54d..99dae69178 100644
--- a/src/target/cortex_swjdp.h
+++ b/src/target/cortex_swjdp.h
@@ -44,8 +44,6 @@
 #define CSYSPWRUPREQ	(1<<30)
 #define CSYSPWRUPACK	(1<<31)
 
-
-
 #define	AHBAP_CSW	0x00
 #define AHBAP_TAR	0x04
 #define AHBAP_DRW	0x0C
@@ -56,7 +54,6 @@
 #define AHBAP_DBGROMA	0xF8
 #define AHBAP_IDR	0xFC
 
-
 #define CSW_8BIT		0
 #define CSW_16BIT		1
 #define CSW_32BIT		2
@@ -65,17 +62,17 @@
 #define CSW_ADDRINC_OFF		0
 #define CSW_ADDRINC_SINGLE	(1<<4)
 #define CSW_ADDRINC_PACKED	(2<<4)
-#define CSW_HPROT	(1<<25)
+#define CSW_HPROT			(1<<25)
 #define CSW_MASTER_DEBUG	(1<<29)
-#define CSW_DBGSWENABLE	(1<<31)
-#define TRANS_MODE_NONE	0
+#define CSW_DBGSWENABLE		(1<<31)
 
+/* transaction mode */
+#define TRANS_MODE_NONE		0
 /* Transaction waits for previous to complete */
 #define TRANS_MODE_ATOMIC	1
 /* Freerunning transactions with delays and overrun checking */
 #define TRANS_MODE_COMPOSITE	2
 
-
 typedef struct swjdp_reg_s
 {
 	int addr;
@@ -96,14 +93,14 @@ typedef struct swjdp_common_s
 	u8  trans_mode;
 	u8  trans_rw;
 	u8  ack;
-	u32 * trans_value;
+	u32 *trans_value;
 } swjdp_common_t;
 
 /* Internal functions used in the module, partial transactions, use with caution */
 extern int swjdp_write_dpacc(swjdp_common_t *swjdp, u32 value, u8 reg_addr);
-//extern int swjdp_write_apacc(swjdp_common_t *swjdp, u32 value, u8 reg_addr);
+/* extern int swjdp_write_apacc(swjdp_common_t *swjdp, u32 value, u8 reg_addr); */
 extern int swjdp_read_dpacc(swjdp_common_t *swjdp, u32 *value, u8 reg_addr);
-//extern int swjdp_read_apacc(swjdp_common_t *swjdp, u32 *value, u8 reg_addr);
+/* extern int swjdp_read_apacc(swjdp_common_t *swjdp, u32 *value, u8 reg_addr); */
 extern int ahbap_write_reg(swjdp_common_t *swjdp, u32 reg_addr, u8* out_value_buf);
 extern int ahbap_read_reg(swjdp_common_t *swjdp, u32 reg_addr, u8 *in_value_buf);
 
@@ -112,7 +109,6 @@ extern int ahbap_read_system_u32(swjdp_common_t *swjdp, u32 address, u32 *value)
 extern int ahbap_write_system_u32(swjdp_common_t *swjdp, u32 address, u32 value);
 extern int swjdp_transaction_endcheck(swjdp_common_t *swjdp);
 
-
 /* External interface, complete atomic operations  */
 /* Host endian word transfer of single memory and system registers */
 extern int ahbap_read_system_atomic_u32(swjdp_common_t *swjdp, u32 address, u32 *value);
@@ -124,6 +120,11 @@ extern int ahbap_write_block(swjdp_common_t *swjdp, u8 *buffer, int bytecount, u
 extern int ahbap_read_coreregister_u32(swjdp_common_t *swjdp, u32 *value, int regnum);
 extern int ahbap_write_coreregister_u32(swjdp_common_t *swjdp, u32 value, int regnum);
 
+extern int ahbap_read_buf(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address);
+extern int ahbap_read_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address);
+extern int ahbap_write_buf(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address);
+extern int ahbap_write_buf_u16(swjdp_common_t *swjdp, u8 *buffer, int count, u32 address);
+
 /* Initialisation of the debug system, power domains and registers */
 extern int ahbap_debugport_init(swjdp_common_t *swjdp);