X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fcortex_m3.c;h=6c95b4ea541cd1cec08e5bb9a45a1129e8912b94;hp=6b015ca0f5e268660b9b2ed63b623dc06215f45e;hb=9741e126fd854815460296ad47d027129c7f17bf;hpb=7d9df4b13474b25c3170c30a0bee52c387d3d049

diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index 6b015ca0f5..6c95b4ea54 100644
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -56,12 +56,6 @@ extern uint8_t armv7m_gdb_dummy_cpsr_value[];
 extern reg_t armv7m_gdb_dummy_cpsr_reg;
 #endif
 
-static int cortex_m3_has_mmu(struct target_s *target, bool *has_mmu)
-{
-	*has_mmu = false;
-	return ERROR_OK;
-}
-
 static int cortexm3_dap_read_coreregister_u32(swjdp_common_t *swjdp,
 		uint32_t *value, int regnum)
 {
@@ -1843,7 +1837,7 @@ static const struct {
 
 static int
 handle_cortex_m3_vector_catch_command(struct command_context_s *cmd_ctx,
-		char *cmd, char **argv, int argc)
+		char *cmd, char **args, int argc)
 {
 	target_t *target = get_current_target(cmd_ctx);
 	struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
@@ -1863,24 +1857,24 @@ handle_cortex_m3_vector_catch_command(struct command_context_s *cmd_ctx,
 		unsigned catch = 0;
 
 		if (argc == 1) {
-			if (strcmp(argv[0], "all") == 0) {
+			if (strcmp(args[0], "all") == 0) {
 				catch = VC_HARDERR | VC_INTERR | VC_BUSERR
 					| VC_STATERR | VC_CHKERR | VC_NOCPERR
 					| VC_MMERR | VC_CORERESET;
 				goto write;
-			} else if (strcmp(argv[0], "none") == 0) {
+			} else if (strcmp(args[0], "none") == 0) {
 				goto write;
 			}
 		}
 		while (argc-- > 0) {
 			for (i = 0; i < ARRAY_SIZE(vec_ids); i++) {
-				if (strcmp(argv[argc], vec_ids[i].name) != 0)
+				if (strcmp(args[argc], vec_ids[i].name) != 0)
 					continue;
 				catch |= vec_ids[i].mask;
 				break;
 			}
 			if (i == ARRAY_SIZE(vec_ids)) {
-				LOG_ERROR("No CM3 vector '%s'", argv[argc]);
+				LOG_ERROR("No CM3 vector '%s'", args[argc]);
 				return ERROR_INVALID_ARGUMENTS;
 			}
 		}
@@ -1998,6 +1992,5 @@ target_type_t cortexm3_target =
 	.register_commands = cortex_m3_register_commands,
 	.target_create = cortex_m3_target_create,
 	.init_target = cortex_m3_init_target,
-	.has_mmu = cortex_m3_has_mmu,
 	.examine = cortex_m3_examine,
 };