X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fcortex_m.h;h=54d7a02287ea25dc672f90b955368509c22af58a;hp=9500acc1d7d6363035bba13e078950dc3c02581a;hb=bc94ca241a5d9b1bbd0b0e79f577a27dab58ecd0;hpb=4e0371bf718c9eb3a862e3c9b113c95cd4c3a479;ds=sidebyside diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h index 9500acc1d7..54d7a02287 100644 --- a/src/target/cortex_m.h +++ b/src/target/cortex_m.h @@ -38,6 +38,12 @@ #define ITM_LAR_KEY 0xC5ACCE55 #define CPUID 0xE000ED00 + +#define ARM_CPUID_PARTNO_MASK 0xFFF0 + +#define CORTEX_M23_PARTNO 0xD200 +#define CORTEX_M33_PARTNO 0xD210 + /* Debug Control Block */ #define DCB_DHCSR 0xE000EDF0 #define DCB_DCRSR 0xE000EDF4 @@ -52,6 +58,9 @@ #define DWT_COMP0 0xE0001020 #define DWT_MASK0 0xE0001024 #define DWT_FUNCTION0 0xE0001028 +#define DWT_DEVARCH 0xE0001FBC + +#define DWT_DEVARCH_ARMV8M 0x101A02 #define FP_CTRL 0xE0002000 #define FP_REMAP 0xE0002004 @@ -127,6 +136,7 @@ #define DFSR_BKPT 2 #define DFSR_DWTTRAP 4 #define DFSR_VCATCH 8 +#define DFSR_EXTERNAL 16 #define FPCR_CODE 0 #define FPCR_LITERAL 1 @@ -136,14 +146,14 @@ #define FPCR_REPLACE_BKPT_BOTH (3 << 30) struct cortex_m_fp_comparator { - int used; + bool used; int type; uint32_t fpcr_value; uint32_t fpcr_address; }; struct cortex_m_dwt_comparator { - int used; + bool used; uint32_t comp; uint32_t mask; uint32_t function; @@ -159,6 +169,7 @@ enum cortex_m_isrmasking_mode { CORTEX_M_ISRMASK_AUTO, CORTEX_M_ISRMASK_OFF, CORTEX_M_ISRMASK_ON, + CORTEX_M_ISRMASK_STEPONLY, }; struct cortex_m_common { @@ -172,25 +183,29 @@ struct cortex_m_common { /* Flash Patch and Breakpoint (FPB) */ int fp_num_lit; int fp_num_code; - int fp_code_available; int fp_rev; - int fpb_enabled; - int auto_bp_type; + bool fpb_enabled; struct cortex_m_fp_comparator *fp_comparator_list; /* Data Watchpoint and Trace (DWT) */ int dwt_num_comp; int dwt_comp_available; + uint32_t dwt_devarch; struct cortex_m_dwt_comparator *dwt_comparator_list; struct reg_cache *dwt_cache; enum cortex_m_soft_reset_config soft_reset_config; + bool vectreset_supported; enum cortex_m_isrmasking_mode isrmasking_mode; struct armv7m_common armv7m; int apsel; + + /* Whether this target has the erratum that makes C_MASKINTS not apply to + * already pending interrupts */ + bool maskints_erratum; }; static inline struct cortex_m_common *