X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fcortex_a8.c;h=e1bd2e3241e14f914df3a133c652d274cb1afd92;hp=a60564c60acf5a5f50eb965332438c4a5ddd3205;hb=af949b2531d2a8863d077025db40cbb170d13a63;hpb=a1971ecacf6450aa57192680fc201928deb46b7d

diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c
index a60564c60a..e1bd2e3241 100644
--- a/src/target/cortex_a8.c
+++ b/src/target/cortex_a8.c
@@ -44,9 +44,9 @@ static int cortex_a8_poll(target_t *target);
 static int cortex_a8_debug_entry(target_t *target);
 static int cortex_a8_restore_context(target_t *target);
 static int cortex_a8_set_breakpoint(struct target_s *target,
-		breakpoint_t *breakpoint, uint8_t matchmode);
+		struct breakpoint *breakpoint, uint8_t matchmode);
 static int cortex_a8_unset_breakpoint(struct target_s *target,
-		breakpoint_t *breakpoint);
+		struct breakpoint *breakpoint);
 static int cortex_a8_dap_read_coreregister_u32(target_t *target,
 		uint32_t *value, int regnum);
 static int cortex_a8_dap_write_coreregister_u32(target_t *target,
@@ -445,7 +445,7 @@ static int cortex_a8_resume(struct target_s *target, int current,
 	struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
 	struct swjdp_common *swjdp = &armv7a->swjdp_info;
 
-//	breakpoint_t *breakpoint = NULL;
+//	struct breakpoint *breakpoint = NULL;
 	uint32_t resume_pc, dscr;
 
 	uint8_t saved_apsel = dap_ap_get_select(swjdp);
@@ -564,7 +564,7 @@ static int cortex_a8_debug_entry(target_t *target)
 	int i;
 	uint32_t regfile[16], pc, cpsr, dscr;
 	int retval = ERROR_OK;
-	working_area_t *regfile_working_area = NULL;
+	struct working_area *regfile_working_area = NULL;
 	struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
 	struct armv7a_common *armv7a = target_to_armv7a(target);
 	struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
@@ -725,8 +725,8 @@ static int cortex_a8_step(struct target_s *target, int current, uint32_t address
 {
 	struct armv7a_common *armv7a = target_to_armv7a(target);
 	struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
-	breakpoint_t *breakpoint = NULL;
-	breakpoint_t stepbreakpoint;
+	struct breakpoint *breakpoint = NULL;
+	struct breakpoint stepbreakpoint;
 
 	int timeout = 100;
 
@@ -961,7 +961,7 @@ int cortex_a8_write_core_reg(struct target_s *target, int num,
 
 /* Setup hardware Breakpoint Register Pair */
 static int cortex_a8_set_breakpoint(struct target_s *target,
-		breakpoint_t *breakpoint, uint8_t matchmode)
+		struct breakpoint *breakpoint, uint8_t matchmode)
 {
 	int retval;
 	int brp_i=0;
@@ -969,7 +969,7 @@ static int cortex_a8_set_breakpoint(struct target_s *target,
 	uint8_t byte_addr_select = 0x0F;
 	struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
 	struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
-	cortex_a8_brp_t * brp_list = cortex_a8->brp_list;
+	struct cortex_a8_brp * brp_list = cortex_a8->brp_list;
 
 	if (breakpoint->set)
 	{
@@ -1035,12 +1035,12 @@ static int cortex_a8_set_breakpoint(struct target_s *target,
 	return ERROR_OK;
 }
 
-static int cortex_a8_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
+static int cortex_a8_unset_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
 {
 	int retval;
 	struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
 	struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
-	cortex_a8_brp_t * brp_list = cortex_a8->brp_list;
+	struct cortex_a8_brp * brp_list = cortex_a8->brp_list;
 
 	if (!breakpoint->set)
 	{
@@ -1093,7 +1093,7 @@ static int cortex_a8_unset_breakpoint(struct target_s *target, breakpoint_t *bre
 	return ERROR_OK;
 }
 
-int cortex_a8_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
+int cortex_a8_add_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
 {
 	struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
 
@@ -1110,7 +1110,7 @@ int cortex_a8_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 	return ERROR_OK;
 }
 
-static int cortex_a8_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
+static int cortex_a8_remove_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
 {
 	struct cortex_a8_common *cortex_a8 = target_to_cortex_a8(target);
 
@@ -1392,7 +1392,7 @@ static int cortex_a8_examine(struct target_s *target)
 	cortex_a8->brp_num = ((didr >> 24) & 0x0F) + 1;
 	cortex_a8->brp_num_context = ((didr >> 20) & 0x0F) + 1;
 	cortex_a8->brp_num_available = cortex_a8->brp_num;
-	cortex_a8->brp_list = calloc(cortex_a8->brp_num, sizeof(cortex_a8_brp_t));
+	cortex_a8->brp_list = calloc(cortex_a8->brp_num, sizeof(struct cortex_a8_brp));
 //	cortex_a8->brb_enabled = ????;
 	for (i = 0; i < cortex_a8->brp_num; i++)
 	{
@@ -1409,7 +1409,7 @@ static int cortex_a8_examine(struct target_s *target)
 	/* Setup Watchpoint Register Pairs */
 	cortex_a8->wrp_num = ((didr >> 28) & 0x0F) + 1;
 	cortex_a8->wrp_num_available = cortex_a8->wrp_num;
-	cortex_a8->wrp_list = calloc(cortex_a8->wrp_num, sizeof(cortex_a8_wrp_t));
+	cortex_a8->wrp_list = calloc(cortex_a8->wrp_num, sizeof(struct cortex_a8_wrp));
 	for (i = 0; i < cortex_a8->wrp_num; i++)
 	{
 		cortex_a8->wrp_list[i].used = 0;
@@ -1435,7 +1435,7 @@ static int cortex_a8_examine(struct target_s *target)
 
 static void cortex_a8_build_reg_cache(target_t *target)
 {
-	reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
+	struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
 
 	(*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
@@ -1453,7 +1453,7 @@ static int cortex_a8_init_target(struct command_context_s *cmd_ctx,
 int cortex_a8_init_arch_info(target_t *target,
 		struct cortex_a8_common *cortex_a8, struct jtag_tap *tap)
 {
-	armv4_5_common_t *armv4_5;
+	struct arm *armv4_5;
 	struct armv7a_common *armv7a;
 
 	armv7a = &cortex_a8->armv7a_common;