X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fcortex_a8.c;h=477223bd459f21638f94c317fc26f6138d0110b9;hp=9d62b01522a4d00233bd9d30487feb0a33d6ae0e;hb=3c2eabd20f5182c53f0bfb0c6f2a9f2595434e87;hpb=818aa27a9d44e62f19cfdf757ac03ec9da2f730b

diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c
index 9d62b01522..477223bd45 100644
--- a/src/target/cortex_a8.c
+++ b/src/target/cortex_a8.c
@@ -33,9 +33,9 @@
 #include "config.h"
 #endif
 
-#define DEFINE_TARGET_TYPE_S
 #include "cortex_a8.h"
 #include "target_request.h"
+#include "target_type.h"
 
 
 /* cli handling */
@@ -83,13 +83,13 @@ target_type_t cortexa8_target =
 	.quit = NULL
 };
 
-int cortex_a8_dcc_read(swjdp_common_t *swjdp, u8 *value, u8 *ctrl)
+int cortex_a8_dcc_read(swjdp_common_t *swjdp, uint8_t *value, uint8_t *ctrl)
 {
-	u16 dcrdr;
+	uint16_t dcrdr;
 
-	mem_ap_read_buf_u16( swjdp, (u8*)&dcrdr, 1, DCB_DCRDR);
-	*ctrl = (u8)dcrdr;
-	*value = (u8)(dcrdr >> 8);
+	mem_ap_read_buf_u16( swjdp, (uint8_t*)&dcrdr, 1, DCB_DCRDR);
+	*ctrl = (uint8_t)dcrdr;
+	*value = (uint8_t)(dcrdr >> 8);
 
 	LOG_DEBUG("data 0x%x ctrl 0x%x", *value, *ctrl);
 
@@ -98,13 +98,13 @@ int cortex_a8_dcc_read(swjdp_common_t *swjdp, u8 *value, u8 *ctrl)
 	if (dcrdr & (1 << 0))
 	{
 		dcrdr = 0;
-		mem_ap_write_buf_u16( swjdp, (u8*)&dcrdr, 1, DCB_DCRDR);
+		mem_ap_write_buf_u16( swjdp, (uint8_t*)&dcrdr, 1, DCB_DCRDR);
 	}
 
 	return ERROR_OK;
 }
 
-int cortex_a8_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int cortex_a8_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	/* get pointers to arch-specific information */
 	armv7m_common_t *armv7m = target->arch_info;
@@ -136,7 +136,7 @@ int cortex_a8_read_memory(struct target_s *target, u32 address, u32 size, u32 co
 	return retval;
 }
 
-int cortex_a8_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int cortex_a8_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	/* get pointers to arch-specific information */
 	armv7m_common_t *armv7m = target->arch_info;
@@ -179,15 +179,15 @@ int cortex_a8_handle_target_request(void *priv)
 
 	if (target->state == TARGET_RUNNING)
 	{
-		u8 data;
-		u8 ctrl;
+		uint8_t data;
+		uint8_t ctrl;
 
 		cortex_a8_dcc_read(swjdp, &data, &ctrl);
 
 		/* check if we have data */
 		if (ctrl & (1 << 0))
 		{
-			u32 request;
+			uint32_t request;
 
 			/* we assume target is quick enough */
 			request = data;