X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farmv8_dpm.c;h=a3edb7f4752cd265dd01f63b1fbd6ea5a06c3ccb;hp=9ba6b5453b4ab731099c06e9496f91fa2aaf8dcd;hb=HEAD;hpb=2cd8ebf44d1afd59b524b09561a8bd2f90f0c27a

diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index 9ba6b5453b..8bb24f225b 100644
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -46,7 +46,7 @@ enum arm_state armv8_dpm_get_core_state(struct arm_dpm *dpm)
 	dpm->last_el = el;
 
 	/* In Debug state, each bit gives the current Execution state of each EL */
-	if ((rw >> el) & 0b1)
+	if ((rw >> el) & 1)
 		return ARM_STATE_AARCH64;
 
 	return ARM_STATE_ARM;
@@ -725,7 +725,8 @@ static int dpmv8_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
 }
 
 /**
- * Read basic registers of the current context:  R0 to R15, and CPSR;
+ * Read basic registers of the current context:  R0 to R15, and CPSR in AArch32
+ * state or R0 to R31, PC and CPSR in AArch64 state;
  * sets the core mode (such as USR or IRQ) and state (such as ARM or Thumb).
  * In normal operation this is called on entry to halting debug state,
  * possibly after some other operations supporting restore of debug state
@@ -772,9 +773,15 @@ int armv8_dpm_read_current_registers(struct arm_dpm *dpm)
 	/* update core mode and state */
 	armv8_set_cpsr(arm, cpsr);
 
-	for (unsigned int i = ARMV8_PC; i < cache->num_regs ; i++) {
+	/* read the remaining registers that would be required by GDB 'g' packet */
+	for (unsigned int i = ARMV8_R2; i <= ARMV8_PC ; i++) {
 		struct arm_reg *arm_reg;
 
+		/* in AArch32 skip AArch64 registers */
+		/* TODO: this should be detected below through arm_reg->mode */
+		if (arm->core_state != ARM_STATE_AARCH64 && i > ARMV8_R14 && i < ARMV8_PC)
+			continue;
+
 		r = armv8_reg_current(arm, i);
 		if (!r->exist || r->valid)
 			continue;