X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farmv7m.h;h=e3087cd9006100cda9b93f5ab8b520ed2cbb09d4;hp=6c751332b4f1f3cfd5dfcea49849f492b08a858f;hb=f90d8fa45f2d4c9d4b7990f198b232ee55cbb4e1;hpb=6d1d58a1fc3dfd60e9cac89460b5a6e438d11efa

diff --git a/src/target/armv7m.h b/src/target/armv7m.h
index 6c751332b4..e3087cd900 100644
--- a/src/target/armv7m.h
+++ b/src/target/armv7m.h
@@ -144,7 +144,7 @@ extern int armv7m_blank_check_memory(struct target_s *target, uint32_t address,
  * Rd: source register
  * SYSm: destination special register
  */
-#define ARMV7M_T_MSR(SYSm, Rn)	((0xF380 | ( Rn << 8 )) | ((0x8800 | SYSm) << 16)) 
+#define ARMV7M_T_MSR(SYSm, Rn)	((0xF380 | (Rn << 8 )) | ((0x8800 | SYSm) << 16)) 
 
 /* Change Processor State. The instruction modifies the PRIMASK and FAULTMASK 
  * special-purpose register values  (Thumb mode) 16 bit Thumb2 instruction