X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farmv7m.h;h=bd92d2d065ada59ca49b886eb708f3880425d176;hp=bc245fb7fd1cc5bf683672aa6a9cd1211e9e20d0;hb=d4b7cbff88bb5eb14fececdbd8e2a0b3e58ce6e0;hpb=08d4411b59dd8bd0e7d8009003b71d23acbf6eee diff --git a/src/target/armv7m.h b/src/target/armv7m.h index bc245fb7fd..bd92d2d065 100644 --- a/src/target/armv7m.h +++ b/src/target/armv7m.h @@ -19,31 +19,20 @@ * GNU General Public License for more details. * * * * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * + * along with this program. If not, see . * ***************************************************************************/ -#ifndef ARMV7M_COMMON_H -#define ARMV7M_COMMON_H +#ifndef OPENOCD_TARGET_ARMV7M_H +#define OPENOCD_TARGET_ARMV7M_H #include "arm_adi_v5.h" #include "arm.h" - -/* define for enabling armv7 gdb workarounds */ -#if 1 -#define ARMV7_GDB_HACKS -#endif - -#ifdef ARMV7_GDB_HACKS -extern uint8_t armv7m_gdb_dummy_cpsr_value[]; -extern struct reg armv7m_gdb_dummy_cpsr_reg; -#endif +#include "armv7m_trace.h" extern const int armv7m_psp_reg_map[]; extern const int armv7m_msp_reg_map[]; -char *armv7m_exception_string(int number); +const char *armv7m_exception_string(int number); /* offsets into armv7m core register cache */ enum { @@ -145,6 +134,9 @@ enum { FPv4_SP, }; +#define ARMV7M_NUM_CORE_REGS (ARMV7M_xPSR + 1) +#define ARMV7M_NUM_CORE_REGS_NOFP (ARMV7M_NUM_CORE_REGS + 6) + #define ARMV7M_COMMON_MAGIC 0x2A452A45 struct armv7m_common { @@ -152,7 +144,9 @@ struct armv7m_common { int common_magic; int exception_number; - struct adiv5_dap dap; + + /* AP this processor is connected to in the DAP */ + struct adiv5_ap *debug_ap; int fp_feature; uint32_t demcr; @@ -160,6 +154,8 @@ struct armv7m_common { /* stlink is a high level adapter, does not support all functions */ bool stlink; + struct armv7m_trace_config trace_config; + /* Direct processor core register read and writes */ int (*load_core_reg_u32)(struct target *target, uint32_t num, uint32_t *value); int (*store_core_reg_u32)(struct target *target, uint32_t num, uint32_t value); @@ -190,12 +186,15 @@ struct armv7m_algorithm { }; struct reg_cache *armv7m_build_reg_cache(struct target *target); +void armv7m_free_reg_cache(struct target *target); + enum armv7m_mode armv7m_number_to_mode(int number); int armv7m_mode_to_number(enum armv7m_mode mode); int armv7m_arch_state(struct target *target); int armv7m_get_gdb_reg_list(struct target *target, - struct reg **reg_list[], int *reg_list_size); + struct reg **reg_list[], int *reg_list_size, + enum target_register_class reg_class); int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m); @@ -230,4 +229,4 @@ int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found); extern const struct command_registration armv7m_command_handlers[]; -#endif /* ARMV7M_H */ +#endif /* OPENOCD_TARGET_ARMV7M_H */