X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farmv7m.c;h=fc3f47ccdb46e6f58b95e9223198622b972ad29d;hp=862261d40ef2c7108759ee2ef47650593f3cb062;hb=c4992c6d863d0ead91d84d19bbfe1643d720b205;hpb=2861877b32a7a2f4022a1c3d9b66c9b4879878ac diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 862261d40e..fc3f47ccdb 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -35,7 +35,6 @@ #endif #include "breakpoints.h" -#include "target.h" #include "armv7m.h" #include "algorithm.h" #include "register.h" @@ -59,33 +58,6 @@ static char *armv7m_exception_strings[] = "DebugMonitor", "RESERVED", "PendSV", "SysTick" }; -/* FIXME these dummies are IDENTICAL to the armv4_5, arm11, and armv7a - * ones... except for naming/scoping - */ -static uint8_t armv7m_gdb_dummy_fp_value[12]; - -static struct reg armv7m_gdb_dummy_fp_reg = -{ - .name = "GDB dummy floating-point register", - .value = armv7m_gdb_dummy_fp_value, - .dirty = 0, - .valid = 1, - .size = 96, - .arch_info = NULL, -}; - -static uint8_t armv7m_gdb_dummy_fps_value[4]; - -static struct reg armv7m_gdb_dummy_fps_reg = -{ - .name = "GDB dummy floating-point status register", - .value = armv7m_gdb_dummy_fps_value, - .dirty = 0, - .valid = 1, - .size = 32, - .arch_info = NULL, -}; - #ifdef ARMV7_GDB_HACKS uint8_t armv7m_gdb_dummy_cpsr_value[] = {0, 0, 0, 0}; @@ -274,21 +246,6 @@ static int armv7m_write_core_reg(struct target *target, unsigned num) return ERROR_OK; } -/** Invalidates cache of core registers set up by armv7m_build_reg_cache(). */ -int armv7m_invalidate_core_regs(struct target *target) -{ - struct armv7m_common *armv7m = target_to_armv7m(target); - int i; - - for (i = 0; i < armv7m->core_cache->num_regs; i++) - { - armv7m->core_cache->reg_list[i].valid = 0; - armv7m->core_cache->reg_list[i].dirty = 0; - } - - return ERROR_OK; -} - /** * Returns generic ARM userspace registers to GDB. * GDB doesn't quite understand that most ARMs don't have floating point @@ -316,11 +273,8 @@ int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int } for (i = 16; i < 24; i++) - { - (*reg_list)[i] = &armv7m_gdb_dummy_fp_reg; - } - - (*reg_list)[24] = &armv7m_gdb_dummy_fps_reg; + (*reg_list)[i] = &arm_gdb_dummy_fp_reg; + (*reg_list)[24] = &arm_gdb_dummy_fps_reg; #ifdef ARMV7_GDB_HACKS /* use dummy cpsr reg otherwise gdb may try and set the thumb bit */ @@ -553,11 +507,9 @@ struct reg_cache *armv7m_build_reg_cache(struct target *target) struct armv7m_core_reg *arch_info = calloc(num_regs, sizeof(struct armv7m_core_reg)); int i; - register_init_dummy(&armv7m_gdb_dummy_fps_reg); #ifdef ARMV7_GDB_HACKS register_init_dummy(&armv7m_gdb_dummy_cpsr_reg); #endif - register_init_dummy(&armv7m_gdb_dummy_fp_reg); /* Build the process context cache */ cache->name = "arm v7m registers"; @@ -644,7 +596,7 @@ int armv7m_checksum_memory(struct target *target, } /* convert flash writing code into a buffer in target endianness */ - for (i = 0; i < (sizeof(cortex_m3_crc_code)/sizeof(uint16_t)); i++) + for (i = 0; i < ARRAY_SIZE(cortex_m3_crc_code); i++) if ((retval = target_write_u16(target, crc_algorithm->address + i*sizeof(uint16_t), cortex_m3_crc_code[i])) != ERROR_OK) { return retval; @@ -707,7 +659,7 @@ int armv7m_blank_check_memory(struct target *target, } /* convert flash writing code into a buffer in target endianness */ - for (i = 0; i < (sizeof(erase_check_code)/sizeof(uint16_t)); i++) + for (i = 0; i < ARRAY_SIZE(erase_check_code); i++) target_write_u16(target, erase_check_algorithm->address + i*sizeof(uint16_t), erase_check_code[i]); armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; @@ -843,34 +795,49 @@ COMMAND_HANDLER(handle_dap_info_command) return dap_info_command(CMD_CTX, swjdp, apsel); } -/** Registers commands used to access DAP resources. */ -int armv7m_register_commands(struct command_context *cmd_ctx) -{ - struct command *arm_adi_v5_dap_cmd; - - arm_adi_v5_dap_cmd = register_command(cmd_ctx, NULL, "dap", - NULL, COMMAND_ANY, - "cortex dap specific commands"); - - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "info", - handle_dap_info_command, COMMAND_EXEC, - "Displays dap info for ap [num]," - "default currently selected AP"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apsel", - handle_dap_apsel_command, COMMAND_EXEC, - "Select a different AP [num] (default 0)"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apid", - handle_dap_apid_command, COMMAND_EXEC, - "Displays id reg from AP [num], " - "default currently selected AP"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "baseaddr", - handle_dap_baseaddr_command, COMMAND_EXEC, - "Displays debug base address from AP [num]," - "default currently selected AP"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "memaccess", - handle_dap_memaccess_command, COMMAND_EXEC, - "set/get number of extra tck for mem-ap " - "memory bus access [0-255]"); - - return ERROR_OK; -} +static const struct command_registration armv7m_exec_command_handlers[] = { + { + .name = "info", + .handler = &handle_dap_info_command, + .mode = COMMAND_EXEC, + .help = "dap info for ap [num], " + "default currently selected AP", + }, + { + .name = "apsel", + .handler = &handle_dap_apsel_command, + .mode = COMMAND_EXEC, + .help = "select a different AP [num] (default 0)", + }, + { + .name = "apid", + .handler = &handle_dap_apid_command, + .mode = COMMAND_EXEC, + .help = "return id reg from AP [num], " + "default currently selected AP", + }, + { + .name = "baseaddr", + .handler = &handle_dap_baseaddr_command, + .mode = COMMAND_EXEC, + .help = "return debug base address from AP [num], " + "default currently selected AP", + }, + { + .name = "memaccess", + .handler = &handle_dap_memaccess_command, + .mode = COMMAND_EXEC, + .help = "set/get number of extra tck for mem-ap memory " + "bus access [0-255]", + }, + COMMAND_REGISTRATION_DONE +}; +const struct command_registration armv7m_command_handlers[] = { + { + .name = "dap", + .mode = COMMAND_ANY, + .help = "Cortex DAP command group", + .chain = armv7m_exec_command_handlers, + }, + COMMAND_REGISTRATION_DONE +};