X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farmv7m.c;h=d9e63d7f31bef568f45348150a36f5d847118c1a;hp=466c0b2a9f8cf598a24461302dfd46e49ecd652c;hb=8c6b95ed162ada54b1165ca0c9b46aa92f92975c;hpb=1aac72d24339380f6e98c50dec4c96ab30537749 diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 466c0b2a9f..d9e63d7f31 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -82,7 +82,7 @@ struct reg armv7m_gdb_dummy_cpsr_reg = */ static const struct { unsigned id; - char *name; + const char *name; unsigned bits; } armv7m_regs[] = { { ARMV7M_R0, "r0", 32 }, @@ -139,9 +139,6 @@ int armv7m_restore_context(struct target *target) } } - if (armv7m->post_restore_context) - armv7m->post_restore_context(target); - return ERROR_OK; } @@ -290,53 +287,45 @@ int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int return ERROR_OK; } -/* run to exit point. return error if exit point was not reached. */ -static int armv7m_run_and_wait(struct target *target, uint32_t entry_point, int timeout_ms, uint32_t exit_point, struct armv7m_common *armv7m) +/** Runs a Thumb algorithm in the target. */ +int armv7m_run_algorithm(struct target *target, + int num_mem_params, struct mem_param *mem_params, + int num_reg_params, struct reg_param *reg_params, + uint32_t entry_point, uint32_t exit_point, + int timeout_ms, void *arch_info) { - uint32_t pc; int retval; - /* This code relies on the target specific resume() and poll()->debug_entry() - * sequence to write register values to the processor and the read them back */ - if ((retval = target_resume(target, 0, entry_point, 1, 1)) != ERROR_OK) - { - return retval; - } - retval = target_wait_state(target, TARGET_HALTED, timeout_ms); - /* If the target fails to halt due to the breakpoint, force a halt */ - if (retval != ERROR_OK || target->state != TARGET_HALTED) - { - if ((retval = target_halt(target)) != ERROR_OK) - return retval; - if ((retval = target_wait_state(target, TARGET_HALTED, 500)) != ERROR_OK) - { - return retval; - } - return ERROR_TARGET_TIMEOUT; - } + retval = armv7m_start_algorithm(target, + num_mem_params, mem_params, + num_reg_params, reg_params, + entry_point, exit_point, + arch_info); - armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc); - if (pc != exit_point) - { - LOG_DEBUG("failed algoritm halted at 0x%" PRIx32 " ", pc); - return ERROR_TARGET_TIMEOUT; - } + if (retval == ERROR_OK) + retval = armv7m_wait_algorithm(target, + num_mem_params, mem_params, + num_reg_params, reg_params, + exit_point, timeout_ms, + arch_info); - return ERROR_OK; + return retval; } -/** Runs a Thumb algorithm in the target. */ -int armv7m_run_algorithm(struct target *target, +/** Starts a Thumb algorithm in the target. */ +int armv7m_start_algorithm(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, - int timeout_ms, void *arch_info) + void *arch_info) { struct armv7m_common *armv7m = target_to_armv7m(target); struct armv7m_algorithm *armv7m_algorithm_info = arch_info; enum armv7m_mode core_mode = armv7m->core_mode; int retval = ERROR_OK; - uint32_t context[ARMV7M_NUM_REGS]; + + /* NOTE: armv7m_run_algorithm requires that each algorithm uses a software breakpoint + * at the exit point */ if (armv7m_algorithm_info->common_magic != ARMV7M_COMMON_MAGIC) { @@ -356,11 +345,12 @@ int armv7m_run_algorithm(struct target *target, { if (!armv7m->core_cache->reg_list[i].valid) armv7m->read_core_reg(target, i); - context[i] = buf_get_u32(armv7m->core_cache->reg_list[i].value, 0, 32); + armv7m_algorithm_info->context[i] = buf_get_u32(armv7m->core_cache->reg_list[i].value, 0, 32); } for (int i = 0; i < num_mem_params; i++) { + // TODO: Write only out params if ((retval = target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value)) != ERROR_OK) return retval; } @@ -394,26 +384,52 @@ int armv7m_run_algorithm(struct target *target, armv7m->core_cache->reg_list[ARMV7M_CONTROL].dirty = 1; armv7m->core_cache->reg_list[ARMV7M_CONTROL].valid = 1; } + armv7m_algorithm_info->core_mode = core_mode; - /* REVISIT speed things up (3% or so in one case) by requiring - * algorithms to include a BKPT instruction at each exit point. - * This eliminates overheads of adding/removing a breakpoint. - */ + retval = target_resume(target, 0, entry_point, 1, 1); + + return retval; +} - /* ARMV7M always runs in Thumb state */ - if ((retval = breakpoint_add(target, exit_point, 2, BKPT_SOFT)) != ERROR_OK) +/** Waits for an algorithm in the target. */ +int armv7m_wait_algorithm(struct target *target, + int num_mem_params, struct mem_param *mem_params, + int num_reg_params, struct reg_param *reg_params, + uint32_t exit_point, int timeout_ms, + void *arch_info) +{ + struct armv7m_common *armv7m = target_to_armv7m(target); + struct armv7m_algorithm *armv7m_algorithm_info = arch_info; + int retval = ERROR_OK; + uint32_t pc; + + /* NOTE: armv7m_run_algorithm requires that each algorithm uses a software breakpoint + * at the exit point */ + + if (armv7m_algorithm_info->common_magic != ARMV7M_COMMON_MAGIC) { - LOG_ERROR("can't add breakpoint to finish algorithm execution"); - return ERROR_TARGET_FAILURE; + LOG_ERROR("current target isn't an ARMV7M target"); + return ERROR_TARGET_INVALID; } - retval = armv7m_run_and_wait(target, entry_point, timeout_ms, exit_point, armv7m); - - breakpoint_remove(target, exit_point); + retval = target_wait_state(target, TARGET_HALTED, timeout_ms); + /* If the target fails to halt due to the breakpoint, force a halt */ + if (retval != ERROR_OK || target->state != TARGET_HALTED) + { + if ((retval = target_halt(target)) != ERROR_OK) + return retval; + if ((retval = target_wait_state(target, TARGET_HALTED, 500)) != ERROR_OK) + { + return retval; + } + return ERROR_TARGET_TIMEOUT; + } - if (retval != ERROR_OK) + armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc); + if (exit_point && (pc != exit_point)) { - return retval; + LOG_DEBUG("failed algorithm halted at 0x%" PRIx32 ", expected 0x%" PRIx32 , pc, exit_point); + return ERROR_TARGET_TIMEOUT; } /* Read memory values to mem_params[] */ @@ -453,18 +469,18 @@ int armv7m_run_algorithm(struct target *target, { uint32_t regvalue; regvalue = buf_get_u32(armv7m->core_cache->reg_list[i].value, 0, 32); - if (regvalue != context[i]) + if (regvalue != armv7m_algorithm_info->context[i]) { LOG_DEBUG("restoring register %s with value 0x%8.8" PRIx32, - armv7m->core_cache->reg_list[i].name, context[i]); + armv7m->core_cache->reg_list[i].name, armv7m_algorithm_info->context[i]); buf_set_u32(armv7m->core_cache->reg_list[i].value, - 0, 32, context[i]); + 0, 32, armv7m_algorithm_info->context[i]); armv7m->core_cache->reg_list[i].valid = 1; armv7m->core_cache->reg_list[i].dirty = 1; } } - armv7m->core_mode = core_mode; + armv7m->core_mode = armv7m_algorithm_info->core_mode; return retval; } @@ -480,14 +496,15 @@ int armv7m_arch_state(struct target *target) sp = buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_R13].value, 0, 32); LOG_USER("target halted due to %s, current mode: %s %s\n" - "xPSR: %#8.8" PRIx32 " pc: %#8.8" PRIx32 " %csp: %#8.8" PRIx32, + "xPSR: %#8.8" PRIx32 " pc: %#8.8" PRIx32 " %csp: %#8.8" PRIx32 "%s", debug_reason_name(target), armv7m_mode_strings[armv7m->core_mode], armv7m_exception_string(armv7m->exception_number), buf_get_u32(arm->cpsr->value, 0, 32), buf_get_u32(arm->pc->value, 0, 32), (ctrl & 0x02) ? 'p' : 'm', - sp); + sp, + arm->is_semihosting ? ", semihosting" : ""); return ERROR_OK; } @@ -540,6 +557,12 @@ struct reg_cache *armv7m_build_reg_cache(struct target *target) return cache; } +static int armv7m_setup_semihosting(struct target *target, int enable) +{ + /* nothing todo for armv7m */ + return ERROR_OK; +} + /** Sets up target as a generic ARMv7-M core */ int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m) { @@ -549,6 +572,7 @@ int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m) arm->core_type = ARM_MODE_THREAD; arm->arch_info = armv7m; + arm->setup_semihosting = armv7m_setup_semihosting; /* FIXME remove v7m-specific r/w core_reg functions; * use the generic ARM core support.. @@ -568,6 +592,8 @@ int armv7m_checksum_memory(struct target *target, struct reg_param reg_params[2]; int retval; + /* see contib/loaders/checksum/armv7m_crc.s for src */ + static const uint16_t cortex_m3_crc_code[] = { 0x4602, /* mov r2, r0 */ 0xF04F, 0x30FF, /* mov r0, #0xffffffff */ @@ -594,24 +620,22 @@ int armv7m_checksum_memory(struct target *target, /* ncomp: */ 0x429C, /* cmp r4, r3 */ 0xD1E9, /* bne nbyte */ - /* end: */ - 0xE7FE, /* b end */ + 0xBE00, /* bkpt #0 */ 0x1DB7, 0x04C1 /* CRC32XOR: .word 0x04C11DB7 */ }; uint32_t i; - if (target_alloc_working_area(target, sizeof(cortex_m3_crc_code), &crc_algorithm) != ERROR_OK) - { - return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; - } + retval = target_alloc_working_area(target, sizeof(cortex_m3_crc_code), &crc_algorithm); + if (retval != ERROR_OK) + return retval; /* convert flash writing code into a buffer in target endianness */ - for (i = 0; i < ARRAY_SIZE(cortex_m3_crc_code); i++) - if ((retval = target_write_u16(target, crc_algorithm->address + i*sizeof(uint16_t), cortex_m3_crc_code[i])) != ERROR_OK) - { - return retval; - } + for (i = 0; i < ARRAY_SIZE(cortex_m3_crc_code); i++) { + retval = target_write_u16(target, crc_algorithm->address + i*sizeof(uint16_t), cortex_m3_crc_code[i]); + if (retval != ERROR_OK) + goto cleanup; + } armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; armv7m_info.core_mode = ARMV7M_MODE_ANY; @@ -622,24 +646,24 @@ int armv7m_checksum_memory(struct target *target, buf_set_u32(reg_params[0].value, 0, 32, address); buf_set_u32(reg_params[1].value, 0, 32, count); - if ((retval = target_run_algorithm(target, 0, NULL, 2, reg_params, - crc_algorithm->address, crc_algorithm->address + (sizeof(cortex_m3_crc_code)-6), 20000, &armv7m_info)) != ERROR_OK) - { - LOG_ERROR("error executing cortex_m3 crc algorithm"); - destroy_reg_param(®_params[0]); - destroy_reg_param(®_params[1]); - target_free_working_area(target, crc_algorithm); - return retval; - } + int timeout = 20000 * (1 + (count / (1024 * 1024))); - *checksum = buf_get_u32(reg_params[0].value, 0, 32); + retval = target_run_algorithm(target, 0, NULL, 2, reg_params, crc_algorithm->address, + crc_algorithm->address + (sizeof(cortex_m3_crc_code) - 6), + timeout, &armv7m_info); + + if (retval == ERROR_OK) + *checksum = buf_get_u32(reg_params[0].value, 0, 32); + else + LOG_ERROR("error executing cortex_m3 crc algorithm"); destroy_reg_param(®_params[0]); destroy_reg_param(®_params[1]); +cleanup: target_free_working_area(target, crc_algorithm); - return ERROR_OK; + return retval; } /** Checks whether a memory region is zeroed. */ @@ -659,8 +683,7 @@ int armv7m_blank_check_memory(struct target *target, 0xEA02, 0x0203, /* and r2, r2, r3 */ 0x3901, /* subs r1, r1, #1 */ 0xD1F9, /* bne loop */ - /* end: */ - 0xE7FE, /* b end */ + 0xBE00, /* bkpt #0 */ }; /* make sure we have a working area */ @@ -685,17 +708,12 @@ int armv7m_blank_check_memory(struct target *target, init_reg_param(®_params[2], "r2", 32, PARAM_IN_OUT); buf_set_u32(reg_params[2].value, 0, 32, 0xff); - if ((retval = target_run_algorithm(target, 0, NULL, 3, reg_params, - erase_check_algorithm->address, erase_check_algorithm->address + (sizeof(erase_check_code)-2), 10000, &armv7m_info)) != ERROR_OK) - { - destroy_reg_param(®_params[0]); - destroy_reg_param(®_params[1]); - destroy_reg_param(®_params[2]); - target_free_working_area(target, erase_check_algorithm); - return 0; - } + retval = target_run_algorithm(target, 0, NULL, 3, reg_params, erase_check_algorithm->address, + erase_check_algorithm->address + (sizeof(erase_check_code) - 2), + 10000, &armv7m_info); - *blank = buf_get_u32(reg_params[2].value, 0, 32); + if (retval == ERROR_OK) + *blank = buf_get_u32(reg_params[2].value, 0, 32); destroy_reg_param(®_params[0]); destroy_reg_param(®_params[1]); @@ -703,7 +721,7 @@ int armv7m_blank_check_memory(struct target *target, target_free_working_area(target, erase_check_algorithm); - return ERROR_OK; + return retval; } int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found) @@ -744,157 +762,12 @@ int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found) return ERROR_OK; } -/*--------------------------------------------------------------------------*/ - -/* - * Only stuff below this line should need to verify that its target - * is an ARMv7-M node. - */ - - -/* - * Return the debug ap baseaddress in hexadecimal; - * no extra output to simplify script processing - */ -COMMAND_HANDLER(handle_dap_baseaddr_command) -{ - struct target *target = get_current_target(CMD_CTX); - struct armv7m_common *armv7m = target_to_armv7m(target); - struct swjdp_common *swjdp = &armv7m->swjdp_info; - - if (!is_armv7m(armv7m)) { - command_print(CMD_CTX, "current target isn't an ARM7-M"); - return ERROR_TARGET_INVALID; - } - - return CALL_COMMAND_HANDLER(dap_baseaddr_command, swjdp); -} - -/* - * Return the debug ap id in hexadecimal; - * no extra output to simplify script processing - */ -COMMAND_HANDLER(handle_dap_apid_command) -{ - struct target *target = get_current_target(CMD_CTX); - struct armv7m_common *armv7m = target_to_armv7m(target); - struct swjdp_common *swjdp = &armv7m->swjdp_info; - - if (!is_armv7m(armv7m)) { - command_print(CMD_CTX, "current target isn't an ARM7-M"); - return ERROR_TARGET_INVALID; - } - - return CALL_COMMAND_HANDLER(dap_apid_command, swjdp); -} - -COMMAND_HANDLER(handle_dap_apsel_command) -{ - struct target *target = get_current_target(CMD_CTX); - struct armv7m_common *armv7m = target_to_armv7m(target); - struct swjdp_common *swjdp = &armv7m->swjdp_info; - - if (!is_armv7m(armv7m)) { - command_print(CMD_CTX, "current target isn't an ARM7-M"); - return ERROR_TARGET_INVALID; - } - - return CALL_COMMAND_HANDLER(dap_apsel_command, swjdp); -} - -COMMAND_HANDLER(handle_dap_memaccess_command) -{ - struct target *target = get_current_target(CMD_CTX); - struct armv7m_common *armv7m = target_to_armv7m(target); - struct swjdp_common *swjdp = &armv7m->swjdp_info; - - if (!is_armv7m(armv7m)) { - command_print(CMD_CTX, "current target isn't an ARM7-M"); - return ERROR_TARGET_INVALID; - } - - return CALL_COMMAND_HANDLER(dap_memaccess_command, swjdp); -} - - -COMMAND_HANDLER(handle_dap_info_command) -{ - struct target *target = get_current_target(CMD_CTX); - struct armv7m_common *armv7m = target_to_armv7m(target); - struct swjdp_common *swjdp = &armv7m->swjdp_info; - uint32_t apsel; - - if (!is_armv7m(armv7m)) { - command_print(CMD_CTX, "current target isn't an ARM7-M"); - return ERROR_TARGET_INVALID; - } - - switch (CMD_ARGC) { - case 0: - apsel = swjdp->apsel; - break; - case 1: - COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel); - break; - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - - return dap_info_command(CMD_CTX, swjdp, apsel); -} - -/* FIXME this table should be part of generic DAP support, and - * be shared by the ARMv7-A/R and ARMv7-M support ... - */ -static const struct command_registration armv7m_exec_command_handlers[] = { - { - .name = "info", - .handler = handle_dap_info_command, - .mode = COMMAND_EXEC, - .help = "display ROM table for MEM-AP " - "(default currently selected AP)", - .usage = "[ap_num]", - }, - { - .name = "apsel", - .handler = handle_dap_apsel_command, - .mode = COMMAND_EXEC, - .help = "Set the currently selected AP (default 0) " - "and display the result", - .usage = "[ap_num]", - }, - { - .name = "apid", - .handler = handle_dap_apid_command, - .mode = COMMAND_EXEC, - .help = "return ID register from AP " - "(default currently selected AP)", - .usage = "[ap_num]", - }, - { - .name = "baseaddr", - .handler = handle_dap_baseaddr_command, - .mode = COMMAND_EXEC, - .help = "return debug base address from MEM-AP " - "(default currently selected AP)", - .usage = "[ap_num]", - }, +const struct command_registration armv7m_command_handlers[] = { { - .name = "memaccess", - .handler = handle_dap_memaccess_command, - .mode = COMMAND_EXEC, - .help = "set/get number of extra tck for MEM-AP memory " - "bus access [0-255]", - .usage = "[cycles]", + .chain = arm_command_handlers, }, - COMMAND_REGISTRATION_DONE -}; -const struct command_registration armv7m_command_handlers[] = { { - .name = "dap", - .mode = COMMAND_EXEC, - .help = "Cortex DAP command group", - .chain = armv7m_exec_command_handlers, + .chain = dap_command_handlers, }, COMMAND_REGISTRATION_DONE };