X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farmv7a.c;h=1e0e02f189f024fa0e639514de6dc3c32a38f80b;hp=499d592d1e2c95b6973cfa21465ac51a399c4975;hb=6a2fd7cad507ef24a7dc4ce3c5f8b5351dd12656;hpb=bc0cc62afd7e84432727f470f74d4fb2b405ce35

diff --git a/src/target/armv7a.c b/src/target/armv7a.c
index 499d592d1e..1e0e02f189 100644
--- a/src/target/armv7a.c
+++ b/src/target/armv7a.c
@@ -176,7 +176,7 @@ reg_t armv7a_gdb_dummy_fp_reg =
 void armv7a_show_fault_registers(target_t *target)
 {
 	uint32_t dfsr, ifsr, dfar, ifar;
-	
+
 	/* get pointers to arch-specific information */
 	armv4_5_common_t *armv4_5 = target->arch_info;
 	armv7a_common_t *armv7a = armv4_5->arch_info;
@@ -186,9 +186,9 @@ void armv7a_show_fault_registers(target_t *target)
 	armv7a->read_cp15(target, 0, 0, 6, 0, &dfar);
 	armv7a->read_cp15(target, 0, 2, 6, 0, &ifar);
 
-	LOG_USER("Data fault registers        DFSR: %8.8" PRIx32 
+	LOG_USER("Data fault registers        DFSR: %8.8" PRIx32
 			", DFAR: %8.8" PRIx32, dfsr, dfar);
-	LOG_USER("Instruction fault registers IFSR: %8.8" PRIx32 
+	LOG_USER("Instruction fault registers IFSR: %8.8" PRIx32
 			", IFAR: %8.8" PRIx32, ifsr, ifar);
 
 }