X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farmv4_5.h;h=3ce4ed0e56ca7089542aa5f76c878125c4ac8537;hp=bacdb72e656a36cb89cdb33a0b34aed68a656add;hb=fa765f137460181fd84529df82309a12c376e71a;hpb=0a1b7dcfc40385f09b5eb088cd97d6ff25a5816d

diff --git a/src/target/armv4_5.h b/src/target/armv4_5.h
index bacdb72e65..3ce4ed0e56 100644
--- a/src/target/armv4_5.h
+++ b/src/target/armv4_5.h
@@ -19,12 +19,11 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
-#ifndef ARMV4_5_H
-#define ARMV4_5_H
+
+#ifndef OPENOCD_TARGET_ARMV4_5_H
+#define OPENOCD_TARGET_ARMV4_5_H
 
 /* This stuff "knows" that its callers aren't talking
  * to microcontroller profile (current Cortex-M) parts.
@@ -42,9 +41,9 @@ enum arm_mode armv4_5_number_to_mode(int number);
 extern const int armv4_5_core_reg_map[8][17];
 
 #define ARMV4_5_CORE_REG_MODE(cache, mode, num) \
-		cache->reg_list[armv4_5_core_reg_map[arm_mode_to_number(mode)][num]]
+		(cache->reg_list[armv4_5_core_reg_map[arm_mode_to_number(mode)][num]])
 
 /* offset into armv4_5 core register cache -- OBSOLETE, DO NOT USE! */
 enum { ARMV4_5_CPSR = 31, };
 
-#endif /* ARMV4_5_H */
+#endif /* OPENOCD_TARGET_ARMV4_5_H */