X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farmv4_5.c;h=ac7f6236ed5824ca578783349bf2b021efc88625;hp=36101b0208a6ebcc71d10852bc77b96638029f38;hb=559d08c19ed838f7bb2a77ce56a5a274641111f8;hpb=4c9f29bd9c9e38c3f495f8c26869f4dfe8fe9983 diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 36101b0208..ac7f6236ed 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -217,7 +217,7 @@ enum arm_mode armv4_5_number_to_mode(int number) } } -const char *arm_state_strings[] = +static const char *arm_state_strings[] = { "ARM", "Thumb", "Jazelle", "ThumbEE", }; @@ -634,7 +634,10 @@ COMMAND_HANDLER(handle_armv4_5_reg_command) } if (!is_arm_mode(armv4_5->core_mode)) + { + LOG_ERROR("not a valid arm core mode - communication failure?"); return ERROR_FAIL; + } if (!armv4_5->full_context) { command_print(CMD_CTX, "error: target doesn't support %s", @@ -820,11 +823,9 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj *const *argv) struct arm *arm; int retval; - context = Jim_GetAssocData(interp, "context"); - if (context == NULL) { - LOG_ERROR("%s: no command context", __func__); - return JIM_ERR; - } + context = current_command_context(interp); + assert( context != NULL); + target = get_current_target(context); if (target == NULL) { LOG_ERROR("%s: no current target", __func__); @@ -840,13 +841,6 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj *const *argv) return JIM_ERR; } - if (arm->core_type == ARM_MODE_THREAD) - { - /* armv7m not supported */ - LOG_ERROR("Unsupported Command"); - return ERROR_OK; - } - if ((argc < 6) || (argc > 7)) { /* FIXME use the command name to verify # params... */ LOG_ERROR("%s: wrong number of arguments", __func__); @@ -951,6 +945,49 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj *const *argv) return JIM_OK; } +COMMAND_HANDLER(handle_arm_semihosting_command) +{ + struct target *target = get_current_target(CMD_CTX); + struct arm *arm = target ? target_to_arm(target) : NULL; + + if (!is_arm(arm)) { + command_print(CMD_CTX, "current target isn't an ARM"); + return ERROR_FAIL; + } + + if (!arm->setup_semihosting) + { + command_print(CMD_CTX, "semihosting not supported for current target"); + } + + if (CMD_ARGC > 0) + { + int semihosting; + + COMMAND_PARSE_ENABLE(CMD_ARGV[0], semihosting); + + if (!target_was_examined(target)) + { + LOG_ERROR("Target not examined yet"); + return ERROR_FAIL; + } + + if (arm->setup_semihosting(target, semihosting) != ERROR_OK) { + LOG_ERROR("Failed to Configure semihosting"); + return ERROR_FAIL; + } + + /* FIXME never let that "catch" be dropped! */ + arm->is_semihosting = semihosting; + } + + command_print(CMD_CTX, "semihosting is %s", + arm->is_semihosting + ? "enabled" : "disabled"); + + return ERROR_OK; +} + static const struct command_registration arm_exec_command_handlers[] = { { .name = "reg", @@ -985,6 +1022,13 @@ static const struct command_registration arm_exec_command_handlers[] = { .help = "read coprocessor register", .usage = "cpnum op1 CRn op2 CRm", }, + { + "semihosting", + .handler = handle_arm_semihosting_command, + .mode = COMMAND_EXEC, + .usage = "['enable'|'disable']", + .help = "activate support for semihosting operations", + }, COMMAND_REGISTRATION_DONE }; @@ -1005,7 +1049,10 @@ int arm_get_gdb_reg_list(struct target *target, int i; if (!is_arm_mode(armv4_5->core_mode)) + { + LOG_ERROR("not a valid arm core mode - communication failure?"); return ERROR_FAIL; + } *reg_list_size = 26; *reg_list = malloc(sizeof(struct reg*) * (*reg_list_size)); @@ -1086,7 +1133,10 @@ int armv4_5_run_algorithm_inner(struct target *target, } if (!is_arm_mode(armv4_5->core_mode)) + { + LOG_ERROR("not a valid arm core mode - communication failure?"); return ERROR_FAIL; + } /* armv5 and later can terminate with BKPT instruction; less overhead */ if (!exit_point && armv4_5->is_armv4) @@ -1245,16 +1295,19 @@ int armv4_5_run_algorithm(struct target *target, int num_mem_params, struct mem_ /** * Runs ARM code in the target to calculate a CRC32 checksum. * - * \todo On ARMv5+, rely on BKPT termination for reduced overhead. */ int arm_checksum_memory(struct target *target, uint32_t address, uint32_t count, uint32_t *checksum) { struct working_area *crc_algorithm; struct arm_algorithm armv4_5_info; + struct arm *armv4_5 = target_to_arm(target); struct reg_param reg_params[2]; int retval; uint32_t i; + uint32_t exit_var = 0; + + /* see contib/loaders/checksum/armv4_5_crc.s for src */ static const uint32_t arm_crc_code[] = { 0xE1A02000, /* mov r2, r0 */ @@ -1280,7 +1333,7 @@ int arm_checksum_memory(struct target *target, 0xE1540003, /* cmp r4, r3 */ 0x1AFFFFF1, /* bne nbyte */ /* end: */ - 0xEAFFFFFE, /* b end */ + 0xe1200070, /* bkpt #0 */ /* CRC32XOR: */ 0x04C11DB7 /* .word 0x04C11DB7 */ }; @@ -1312,9 +1365,13 @@ int arm_checksum_memory(struct target *target, /* 20 second timeout/megabyte */ int timeout = 20000 * (1 + (count / (1024 * 1024))); + /* armv4 must exit using a hardware breakpoint */ + if (armv4_5->is_armv4) + exit_var = crc_algorithm->address + sizeof(arm_crc_code) - 8; + retval = target_run_algorithm(target, 0, NULL, 2, reg_params, crc_algorithm->address, - crc_algorithm->address + sizeof(arm_crc_code) - 8, + exit_var, timeout, &armv4_5_info); if (retval != ERROR_OK) { LOG_ERROR("error executing ARM crc algorithm"); @@ -1339,7 +1396,6 @@ int arm_checksum_memory(struct target *target, * all ones. NOR flash which has been erased, and thus may be written, * holds all ones. * - * \todo On ARMv5+, rely on BKPT termination for reduced overhead. */ int arm_blank_check_memory(struct target *target, uint32_t address, uint32_t count, uint32_t *blank) @@ -1347,8 +1403,10 @@ int arm_blank_check_memory(struct target *target, struct working_area *check_algorithm; struct reg_param reg_params[3]; struct arm_algorithm armv4_5_info; + struct arm *armv4_5 = target_to_arm(target); int retval; uint32_t i; + uint32_t exit_var = 0; static const uint32_t check_code[] = { /* loop: */ @@ -1357,7 +1415,7 @@ int arm_blank_check_memory(struct target *target, 0xe2511001, /* subs r1, r1, #1 */ 0x1afffffb, /* bne loop */ /* end: */ - 0xeafffffe /* b end */ + 0xe1200070, /* bkpt #0 */ }; /* make sure we have a working area */ @@ -1389,9 +1447,13 @@ int arm_blank_check_memory(struct target *target, init_reg_param(®_params[2], "r2", 32, PARAM_IN_OUT); buf_set_u32(reg_params[2].value, 0, 32, 0xff); + /* armv4 must exit using a hardware breakpoint */ + if (armv4_5->is_armv4) + exit_var = check_algorithm->address + sizeof(check_code) - 4; + retval = target_run_algorithm(target, 0, NULL, 3, reg_params, check_algorithm->address, - check_algorithm->address + sizeof(check_code) - 4, + exit_var, 10000, &armv4_5_info); if (retval != ERROR_OK) { destroy_reg_param(®_params[0]);