X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farmv4_5.c;h=4040623e3a3b3391b4e03041815af44a6a3c6dc3;hp=0fe9ee4ad610bd0828953b7d5241e87bc8fd3ec8;hb=af949b2531d2a8863d077025db40cbb170d13a63;hpb=03ac53a2cfdb7d0715f7060cecf8719068f6fae1

diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 0fe9ee4ad6..4040623e3a 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -32,7 +32,7 @@
 #include "binarybuffer.h"
 
 
-bitfield_desc_t armv4_5_psr_bitfield_desc[] =
+struct bitfield_desc armv4_5_psr_bitfield_desc[] =
 {
 	{"M[4:0]", 5},
 	{"T", 1},
@@ -80,7 +80,7 @@ char* armv4_5_state_strings[] =
 
 int armv4_5_core_reg_arch_type = -1;
 
-armv4_5_core_reg_t armv4_5_core_reg_list_arch_info[] =
+struct armv4_5_core_reg armv4_5_core_reg_list_arch_info[] =
 {
 	{0, ARMV4_5_MODE_ANY, NULL, NULL},
 	{1, ARMV4_5_MODE_ANY, NULL, NULL},
@@ -170,7 +170,7 @@ reg_t armv4_5_gdb_dummy_fps_reg =
 int armv4_5_get_core_reg(reg_t *reg)
 {
 	int retval;
-	armv4_5_core_reg_t *armv4_5 = reg->arch_info;
+	struct armv4_5_core_reg *armv4_5 = reg->arch_info;
 	target_t *target = armv4_5->target;
 
 	if (target->state != TARGET_HALTED)
@@ -187,7 +187,7 @@ int armv4_5_get_core_reg(reg_t *reg)
 
 int armv4_5_set_core_reg(reg_t *reg, uint8_t *buf)
 {
-	armv4_5_core_reg_t *armv4_5 = reg->arch_info;
+	struct armv4_5_core_reg *armv4_5 = reg->arch_info;
 	target_t *target = armv4_5->target;
 	struct armv4_5_common_s *armv4_5_target = target_to_armv4_5(target);
 	uint32_t value = buf_get_u32(buf, 0, 32);
@@ -249,12 +249,12 @@ int armv4_5_invalidate_core_regs(target_t *target)
 	return ERROR_OK;
 }
 
-reg_cache_t* armv4_5_build_reg_cache(target_t *target, armv4_5_common_t *armv4_5_common)
+struct reg_cache* armv4_5_build_reg_cache(target_t *target, struct arm *armv4_5_common)
 {
 	int num_regs = 37;
-	reg_cache_t *cache = malloc(sizeof(reg_cache_t));
+	struct reg_cache *cache = malloc(sizeof(struct reg_cache));
 	reg_t *reg_list = malloc(sizeof(reg_t) * num_regs);
-	armv4_5_core_reg_t *arch_info = malloc(sizeof(armv4_5_core_reg_t) * num_regs);
+	struct armv4_5_core_reg *arch_info = malloc(sizeof(struct armv4_5_core_reg) * num_regs);
 	int i;
 
 	cache->name = "arm v4/5 registers";
@@ -307,7 +307,7 @@ int armv4_5_arch_state(struct target_s *target)
 	return ERROR_OK;
 }
 
-int handle_armv4_5_reg_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_armv4_5_reg_command)
 {
 	char output[128];
 	int output_len;
@@ -359,7 +359,7 @@ int handle_armv4_5_reg_command(struct command_context_s *cmd_ctx, char *cmd, cha
 	return ERROR_OK;
 }
 
-int handle_armv4_5_core_state_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_armv4_5_core_state_command)
 {
 	target_t *target = get_current_target(cmd_ctx);
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
@@ -387,9 +387,7 @@ int handle_armv4_5_core_state_command(struct command_context_s *cmd_ctx, char *c
 	return ERROR_OK;
 }
 
-static int
-handle_armv4_5_disassemble_command(struct command_context_s *cmd_ctx,
-		char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_armv4_5_disassemble_command)
 {
 	int retval = ERROR_OK;
 	target_t *target = get_current_target(cmd_ctx);
@@ -397,7 +395,7 @@ handle_armv4_5_disassemble_command(struct command_context_s *cmd_ctx,
 	uint32_t address;
 	int count = 1;
 	int i;
-	arm_instruction_t cur_instruction;
+	struct arm_instruction cur_instruction;
 	uint32_t opcode;
 	uint16_t thumb_opcode;
 	int thumb = 0;
@@ -545,10 +543,10 @@ static int armv4_5_run_algorithm_completion(struct target_s *target, uint32_t ex
 	return ERROR_OK;
 }
 
-int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info))
+int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, uint32_t exit_point, int timeout_ms, void *arch_info))
 {
 	struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
-	armv4_5_algorithm_t *armv4_5_algorithm_info = arch_info;
+	struct armv4_5_algorithm *armv4_5_algorithm_info = arch_info;
 	enum armv4_5_state core_state = armv4_5->core_state;
 	enum armv4_5_mode core_mode = armv4_5->core_mode;
 	uint32_t context[17];
@@ -710,12 +708,12 @@ int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem
 	return retval;
 }
 
-int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info)
+int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info)
 {
 	return armv4_5_run_algorithm_inner(target, num_mem_params, mem_params, num_reg_params, reg_params, entry_point, exit_point, timeout_ms, arch_info, armv4_5_run_algorithm_completion);
 }
 
-int armv4_5_init_arch_info(target_t *target, armv4_5_common_t *armv4_5)
+int armv4_5_init_arch_info(target_t *target, struct arm *armv4_5)
 {
 	target->arch_info = armv4_5;