X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm_disassembler.h;h=774dd2c2f968105f13efa85864815bae8b31aff0;hp=c69ab65920625f4fb3c17b75a0037ec49245a589;hb=0f1163e823c6ca3c2a81fa296157f5dde0635fea;hpb=7de3c44320af79e5d666e5a4cb4a669f5ecb8eb5;ds=sidebyside

diff --git a/src/target/arm_disassembler.h b/src/target/arm_disassembler.h
index c69ab65920..774dd2c2f9 100644
--- a/src/target/arm_disassembler.h
+++ b/src/target/arm_disassembler.h
@@ -170,16 +170,16 @@ struct arm_load_store_instr
 	} offset;
 };
 
-typedef struct arm_load_store_multiple_instr_s
+struct arm_load_store_multiple_instr
 {
 	uint8_t Rn;
 	uint32_t register_list;
 	uint8_t addressing_mode; /* 0: IA, 1: IB, 2: DA, 3: DB */
 	uint8_t S;
 	uint8_t W;
-} arm_load_store_multiple_instr_t;
+};
 
-typedef struct arm_instruction_s
+struct arm_instruction
 {
 	enum arm_instruction_type type;
 	char text[128];
@@ -192,18 +192,18 @@ typedef struct arm_instruction_s
 		struct arm_b_bl_bx_blx_instr b_bl_bx_blx;
 		struct arm_data_proc_instr data_proc;
 		struct arm_load_store_instr load_store;
-		arm_load_store_multiple_instr_t load_store_multiple;
+		struct arm_load_store_multiple_instr load_store_multiple;
 	} info;
 
-} arm_instruction_t;
+};
 
 int arm_evaluate_opcode(uint32_t opcode, uint32_t address,
-		arm_instruction_t *instruction);
+		struct arm_instruction *instruction);
 int thumb_evaluate_opcode(uint16_t opcode, uint32_t address,
-		arm_instruction_t *instruction);
-int thumb2_opcode(target_t *target, uint32_t address,
-		arm_instruction_t *instruction);
-int arm_access_size(arm_instruction_t *instruction);
+		struct arm_instruction *instruction);
+int thumb2_opcode(struct target *target, uint32_t address,
+		struct arm_instruction *instruction);
+int arm_access_size(struct arm_instruction *instruction);
 
 #define COND(opcode) (arm_condition_strings[(opcode & 0xf0000000) >> 28])