X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm_disassembler.h;h=6f8f65d448d2d1d0c6ff781337cf846fe2a17e40;hp=bdfdb038cd78d6316e9deca38760e6434fa01955;hb=f19ac83152b54a204b8148815a538d868973e1e1;hpb=374127301ec1d72033b9d573b72c7abdfd61990d
diff --git a/src/target/arm_disassembler.h b/src/target/arm_disassembler.h
index bdfdb038cd..6f8f65d448 100644
--- a/src/target/arm_disassembler.h
+++ b/src/target/arm_disassembler.h
@@ -13,15 +13,11 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ * along with this program. If not, see . *
***************************************************************************/
-#ifndef ARM_DISASSEMBLER_H
-#define ARM_DISASSEMBLER_H
-
-#include
+#ifndef OPENOCD_TARGET_ARM_DISASSEMBLER_H
+#define OPENOCD_TARGET_ARM_DISASSEMBLER_H
enum arm_instruction_type {
ARM_UNKNOWN_INSTUCTION,
@@ -86,9 +82,14 @@ enum arm_instruction_type {
/* Miscellaneous instructions */
ARM_CLZ,
+ /* Exception return instructions */
+ ARM_ERET,
+
/* Exception generating instructions */
ARM_BKPT,
ARM_SWI,
+ ARM_HVC,
+ ARM_SMC,
/* Coprocessor instructions */
ARM_CDP,
@@ -200,4 +201,4 @@ int arm_access_size(struct arm_instruction *instruction);
#define COND(opcode) (arm_condition_strings[(opcode & 0xf0000000) >> 28])
-#endif /* ARM_DISASSEMBLER_H */
+#endif /* OPENOCD_TARGET_ARM_DISASSEMBLER_H */