X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm_adi_v5.c;h=41bd26153ffb0df984e90eb1ef595222e074667d;hp=7f89f2eed9d1ad1d947b385dbf55c62b615f0ec6;hb=1338cf60b91c582fa4b27d5226ab4374117be415;hpb=508bc7ca360719dd89a3fd3517732392bed8c16c diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 7f89f2eed9..41bd26153f 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -10,6 +10,9 @@ * * * Copyright (C) 2009-2010 by David Brownell * * * + * Copyright (C) 2013 by Andreas Fritiofson * + * andreas.fritiofson@gmail.com * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -23,7 +26,7 @@ * You should have received a copy of the GNU General Public License * * along with this program; if not, write to the * * Free Software Foundation, Inc., * - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * ***************************************************************************/ /** @@ -69,11 +72,11 @@ #include "config.h" #endif +#include "jtag/interface.h" #include "arm.h" #include "arm_adi_v5.h" #include - /* ARM ADI Specification requires at least 10 bits used for TAR autoincrement */ /* @@ -82,7 +85,7 @@ */ static uint32_t max_tar_block_size(uint32_t tar_autoincr_block, uint32_t address) { - return (tar_autoincr_block - ((tar_autoincr_block - 1) & address)) >> 2; + return tar_autoincr_block - ((tar_autoincr_block - 1) & address); } /*************************************************************************** @@ -100,12 +103,11 @@ static uint32_t max_tar_block_size(uint32_t tar_autoincr_block, uint32_t address * @param apsel Number of the AP to (implicitly) use with further * transactions. This normally identifies a MEM-AP. */ -void dap_ap_select(struct adiv5_dap *dap,uint8_t ap) +void dap_ap_select(struct adiv5_dap *dap, uint8_t ap) { uint32_t new_ap = (ap << 24) & 0xFF000000; - if (new_ap != dap->ap_current) - { + if (new_ap != dap->ap_current) { dap->ap_current = new_ap; /* Switching AP invalidates cached values. * Values MUST BE UPDATED BEFORE AP ACCESS. @@ -116,6 +118,33 @@ void dap_ap_select(struct adiv5_dap *dap,uint8_t ap) } } +static int dap_setup_accessport_csw(struct adiv5_dap *dap, uint32_t csw) +{ + csw = csw | CSW_DBGSWENABLE | CSW_MASTER_DEBUG | CSW_HPROT | + dap->apcsw[dap->ap_current >> 24]; + + if (csw != dap->ap_csw_value) { + /* LOG_DEBUG("DAP: Set CSW %x",csw); */ + int retval = dap_queue_ap_write(dap, AP_REG_CSW, csw); + if (retval != ERROR_OK) + return retval; + dap->ap_csw_value = csw; + } + return ERROR_OK; +} + +static int dap_setup_accessport_tar(struct adiv5_dap *dap, uint32_t tar) +{ + if (tar != dap->ap_tar_value || dap->ap_csw_value & CSW_ADDRINC_MASK) { + /* LOG_DEBUG("DAP: Set TAR %x",tar); */ + int retval = dap_queue_ap_write(dap, AP_REG_TAR, tar); + if (retval != ERROR_OK) + return retval; + dap->ap_tar_value = tar; + } + return ERROR_OK; +} + /** * Queue transactions setting up transfer parameters for the * currently selected MEM-AP. @@ -138,27 +167,12 @@ void dap_ap_select(struct adiv5_dap *dap,uint8_t ap) int dap_setup_accessport(struct adiv5_dap *dap, uint32_t csw, uint32_t tar) { int retval; - - csw = csw | CSW_DBGSWENABLE | CSW_MASTER_DEBUG | CSW_HPROT; - if (csw != dap->ap_csw_value) - { - /* LOG_DEBUG("DAP: Set CSW %x",csw); */ - retval = dap_queue_ap_write(dap, AP_REG_CSW, csw); - if (retval != ERROR_OK) - return retval; - dap->ap_csw_value = csw; - } - if (tar != dap->ap_tar_value) - { - /* LOG_DEBUG("DAP: Set TAR %x",tar); */ - retval = dap_queue_ap_write(dap, AP_REG_TAR, tar); - if (retval != ERROR_OK) - return retval; - dap->ap_tar_value = tar; - } - /* Disable TAR cache when autoincrementing */ - if (csw & CSW_ADDRINC_MASK) - dap->ap_tar_value = -1; + retval = dap_setup_accessport_csw(dap, csw); + if (retval != ERROR_OK) + return retval; + retval = dap_setup_accessport_tar(dap, tar); + if (retval != ERROR_OK) + return retval; return ERROR_OK; } @@ -263,622 +277,220 @@ int mem_ap_write_atomic_u32(struct adiv5_dap *dap, uint32_t address, return dap_run(dap); } -/***************************************************************************** -* * -* mem_ap_write_buf(struct adiv5_dap *dap, uint8_t *buffer, int count, uint32_t address) * -* * -* Write a buffer in target order (little endian) * -* * -*****************************************************************************/ -int mem_ap_write_buf_u32(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address) +/** + * Synchronous write of a block of memory, using a specific access size. + * + * @param dap The DAP connected to the MEM-AP. + * @param buffer The data buffer to write. No particular alignment is assumed. + * @param size Which access size to use, in bytes. 1, 2 or 4. + * @param count The number of writes to do (in size units, not bytes). + * @param address Address to be written; it must be writable by the currently selected MEM-AP. + * @param addrinc Whether the target address should be increased for each write or not. This + * should normally be true, except when writing to e.g. a FIFO. + * @return ERROR_OK on success, otherwise an error code. + */ +int mem_ap_write(struct adiv5_dap *dap, const uint8_t *buffer, uint32_t size, uint32_t count, + uint32_t address, bool addrinc) { - int wcount, blocksize, writecount, errorcount = 0, retval = ERROR_OK; - uint32_t adr = address; - const uint8_t* pBuffer = buffer; - - count >>= 2; - wcount = count; - - /* if we have an unaligned access - reorder data */ - if (adr & 0x3u) - { - for (writecount = 0; writecount < count; writecount++) - { - int i; - uint32_t outvalue; - memcpy(&outvalue, pBuffer, sizeof(uint32_t)); - - for (i = 0; i < 4; i++) - { - *((uint8_t*)pBuffer + (adr & 0x3)) = outvalue; - outvalue >>= 8; - adr++; - } - pBuffer += sizeof(uint32_t); - } - } - - while (wcount > 0) - { - /* Adjust to write blocks within boundaries aligned to the TAR autoincremnent size*/ - blocksize = max_tar_block_size(dap->tar_autoincr_block, address); - if (wcount < blocksize) - blocksize = wcount; + size_t nbytes = size * count; + const uint32_t csw_addrincr = addrinc ? CSW_ADDRINC_SINGLE : CSW_ADDRINC_OFF; + uint32_t csw_size; + int retval; - /* handle unaligned data at 4k boundary */ - if (blocksize == 0) - blocksize = 1; + if (size == 4) + csw_size = CSW_32BIT; + else if (size == 2) + csw_size = CSW_16BIT; + else if (size == 1) + csw_size = CSW_8BIT; + else + return ERROR_TARGET_UNALIGNED_ACCESS; - retval = dap_setup_accessport(dap, CSW_32BIT | CSW_ADDRINC_SINGLE, address); - if (retval != ERROR_OK) - return retval; + retval = dap_setup_accessport_tar(dap, address); + if (retval != ERROR_OK) + return retval; - for (writecount = 0; writecount < blocksize; writecount++) - { - retval = dap_queue_ap_write(dap, AP_REG_DRW, - *(uint32_t *) ((void *) (buffer + 4 * writecount))); - if (retval != ERROR_OK) - break; - } + while (nbytes > 0) { + uint32_t this_size = size; - if ((retval = dap_run(dap)) == ERROR_OK) - { - wcount = wcount - blocksize; - address = address + 4 * blocksize; - buffer = buffer + 4 * blocksize; + /* Select packed transfer if possible */ + if (addrinc && dap->packed_transfers && nbytes >= 4 + && max_tar_block_size(dap->tar_autoincr_block, address) >= 4) { + this_size = 4; + retval = dap_setup_accessport_csw(dap, csw_size | CSW_ADDRINC_PACKED); + } else { + retval = dap_setup_accessport_csw(dap, csw_size | csw_addrincr); } - else - { - errorcount++; - } - - if (errorcount > 1) - { - LOG_WARNING("Block write error address 0x%" PRIx32 ", wcount 0x%x", address, wcount); - return retval; - } - } - - return retval; -} - -static int mem_ap_write_buf_packed_u16(struct adiv5_dap *dap, - const uint8_t *buffer, int count, uint32_t address) -{ - int retval = ERROR_OK; - int wcount, blocksize, writecount, i; - - wcount = count >> 1; - - while (wcount > 0) - { - int nbytes; - - /* Adjust to write blocks within boundaries aligned to the TAR autoincremnent size*/ - blocksize = max_tar_block_size(dap->tar_autoincr_block, address); - if (wcount < blocksize) - blocksize = wcount; - - /* handle unaligned data at 4k boundary */ - if (blocksize == 0) - blocksize = 1; - - retval = dap_setup_accessport(dap, CSW_16BIT | CSW_ADDRINC_PACKED, address); if (retval != ERROR_OK) - return retval; - writecount = blocksize; - - do - { - nbytes = MIN((writecount << 1), 4); - - if (nbytes < 4) - { - retval = mem_ap_write_buf_u16(dap, buffer, - nbytes, address); - if (retval != ERROR_OK) - { - LOG_WARNING("Block write error address " - "0x%" PRIx32 ", count 0x%x", - address, count); - return retval; - } - - address += nbytes >> 1; - } - else - { - uint32_t outvalue; - memcpy(&outvalue, buffer, sizeof(uint32_t)); - - for (i = 0; i < nbytes; i++) - { - *((uint8_t*)buffer + (address & 0x3)) = outvalue; - outvalue >>= 8; - address++; - } - - memcpy(&outvalue, buffer, sizeof(uint32_t)); - retval = dap_queue_ap_write(dap, - AP_REG_DRW, outvalue); - if (retval != ERROR_OK) - break; - - if ((retval = dap_run(dap)) != ERROR_OK) - { - LOG_WARNING("Block write error address " - "0x%" PRIx32 ", count 0x%x", - address, count); - return retval; - } - } - - buffer += nbytes >> 1; - writecount -= nbytes >> 1; - - } while (writecount); - wcount -= blocksize; - } - - return retval; -} + break; -int mem_ap_write_buf_u16(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address) -{ - int retval = ERROR_OK; + /* How many source bytes each transfer will consume, and their location in the DRW, + * depends on the type of transfer and alignment. See ARM document IHI0031C. */ + uint32_t outvalue = 0; + switch (this_size) { + case 4: + outvalue |= (uint32_t)*buffer++ << 8 * (address++ & 3); + outvalue |= (uint32_t)*buffer++ << 8 * (address++ & 3); + case 2: + outvalue |= (uint32_t)*buffer++ << 8 * (address++ & 3); + case 1: + outvalue |= (uint32_t)*buffer++ << 8 * (address++ & 3); + } - if (count >= 4) - return mem_ap_write_buf_packed_u16(dap, buffer, count, address); + nbytes -= this_size; - while (count > 0) - { - retval = dap_setup_accessport(dap, CSW_16BIT | CSW_ADDRINC_SINGLE, address); - if (retval != ERROR_OK) - return retval; - uint16_t svalue; - memcpy(&svalue, buffer, sizeof(uint16_t)); - uint32_t outvalue = (uint32_t)svalue << 8 * (address & 0x3); retval = dap_queue_ap_write(dap, AP_REG_DRW, outvalue); if (retval != ERROR_OK) break; - retval = dap_run(dap); - if (retval != ERROR_OK) - break; - - count -= 2; - address += 2; - buffer += 2; - } - - return retval; -} - -static int mem_ap_write_buf_packed_u8(struct adiv5_dap *dap, - const uint8_t *buffer, int count, uint32_t address) -{ - int retval = ERROR_OK; - int wcount, blocksize, writecount, i; - - wcount = count; - - while (wcount > 0) - { - int nbytes; - - /* Adjust to write blocks within boundaries aligned to the TAR autoincremnent size*/ - blocksize = max_tar_block_size(dap->tar_autoincr_block, address); - - if (wcount < blocksize) - blocksize = wcount; - - retval = dap_setup_accessport(dap, CSW_8BIT | CSW_ADDRINC_PACKED, address); - if (retval != ERROR_OK) - return retval; - writecount = blocksize; - - do - { - nbytes = MIN(writecount, 4); - - if (nbytes < 4) - { - retval = mem_ap_write_buf_u8(dap, buffer, nbytes, address); - if (retval != ERROR_OK) - { - LOG_WARNING("Block write error address " - "0x%" PRIx32 ", count 0x%x", - address, count); - return retval; - } - - address += nbytes; - } - else - { - uint32_t outvalue; - memcpy(&outvalue, buffer, sizeof(uint32_t)); - - for (i = 0; i < nbytes; i++) - { - *((uint8_t*)buffer + (address & 0x3)) = outvalue; - outvalue >>= 8; - address++; - } - - memcpy(&outvalue, buffer, sizeof(uint32_t)); - retval = dap_queue_ap_write(dap, - AP_REG_DRW, outvalue); - if (retval != ERROR_OK) - break; - - if ((retval = dap_run(dap)) != ERROR_OK) - { - LOG_WARNING("Block write error address " - "0x%" PRIx32 ", count 0x%x", - address, count); - return retval; - } - } - - buffer += nbytes; - writecount -= nbytes; - - } while (writecount); - wcount -= blocksize; + /* Rewrite TAR if it wrapped */ + if (addrinc && address % dap->tar_autoincr_block < size && nbytes > 0) { + retval = dap_setup_accessport_tar(dap, address); + if (retval != ERROR_OK) + break; + } } - return retval; -} - -int mem_ap_write_buf_u8(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address) -{ - int retval = ERROR_OK; - - if (count >= 4) - return mem_ap_write_buf_packed_u8(dap, buffer, count, address); - - while (count > 0) - { - retval = dap_setup_accessport(dap, CSW_8BIT | CSW_ADDRINC_SINGLE, address); - if (retval != ERROR_OK) - return retval; - uint32_t outvalue = (uint32_t)*buffer << 8 * (address & 0x3); - retval = dap_queue_ap_write(dap, AP_REG_DRW, outvalue); - if (retval != ERROR_OK) - break; - + /* REVISIT: Might want to have a queued version of this function that does not run. */ + if (retval == ERROR_OK) retval = dap_run(dap); - if (retval != ERROR_OK) - break; - count--; - address++; - buffer++; + if (retval != ERROR_OK) { + uint32_t tar; + if (dap_queue_ap_read(dap, AP_REG_TAR, &tar) == ERROR_OK + && dap_run(dap) == ERROR_OK) + LOG_ERROR("Failed to write memory at 0x%08"PRIx32, tar); + else + LOG_ERROR("Failed to write memory and, additionally, failed to find out where"); } return retval; } -/* FIXME don't import ... this is a temporary workaround for the - * mem_ap_read_buf_u32() mess, until it's no longer JTAG-specific. - */ -extern int adi_jtag_dp_scan(struct adiv5_dap *dap, - uint8_t instr, uint8_t reg_addr, uint8_t RnW, - uint8_t *outvalue, uint8_t *invalue, uint8_t *ack); - /** - * Synchronously read a block of 32-bit words into a buffer + * Synchronous read of a block of memory, using a specific access size. + * * @param dap The DAP connected to the MEM-AP. - * @param buffer where the words will be stored (in host byte order). - * @param count How many words to read. - * @param address Memory address from which to read words; all the - * words must be readable by the currently selected MEM-AP. + * @param buffer The data buffer to receive the data. No particular alignment is assumed. + * @param size Which access size to use, in bytes. 1, 2 or 4. + * @param count The number of reads to do (in size units, not bytes). + * @param address Address to be read; it must be readable by the currently selected MEM-AP. + * @param addrinc Whether the target address should be increased after each read or not. This + * should normally be true, except when reading from e.g. a FIFO. + * @return ERROR_OK on success, otherwise an error code. */ -int mem_ap_read_buf_u32(struct adiv5_dap *dap, uint8_t *buffer, - int count, uint32_t address) +int mem_ap_read(struct adiv5_dap *dap, uint8_t *buffer, uint32_t size, uint32_t count, + uint32_t adr, bool addrinc) { - int wcount, blocksize, readcount, errorcount = 0, retval = ERROR_OK; - uint32_t adr = address; - uint8_t* pBuffer = buffer; - - count >>= 2; - wcount = count; - - while (wcount > 0) - { - /* Adjust to read blocks within boundaries aligned to the - * TAR autoincrement size (at least 2^10). Autoincrement - * mode avoids an extra per-word roundtrip to update TAR. - */ - blocksize = max_tar_block_size(dap->tar_autoincr_block, - address); - if (wcount < blocksize) - blocksize = wcount; - - /* handle unaligned data at 4k boundary */ - if (blocksize == 0) - blocksize = 1; + size_t nbytes = size * count; + const uint32_t csw_addrincr = addrinc ? CSW_ADDRINC_SINGLE : CSW_ADDRINC_OFF; + uint32_t csw_size; + uint32_t address = adr; + int retval; - retval = dap_setup_accessport(dap, CSW_32BIT | CSW_ADDRINC_SINGLE, - address); - if (retval != ERROR_OK) - return retval; + if (size == 4) + csw_size = CSW_32BIT; + else if (size == 2) + csw_size = CSW_16BIT; + else if (size == 1) + csw_size = CSW_8BIT; + else + return ERROR_TARGET_UNALIGNED_ACCESS; + + /* Allocate buffer to hold the sequence of DRW reads that will be made. This is a significant + * over-allocation if packed transfers are going to be used, but determining the real need at + * this point would be messy. */ + uint32_t *read_buf = malloc(count * sizeof(uint32_t)); + uint32_t *read_ptr = read_buf; + if (read_buf == NULL) { + LOG_ERROR("Failed to allocate read buffer"); + return ERROR_FAIL; + } - /* FIXME remove these three calls to adi_jtag_dp_scan(), - * so this routine becomes transport-neutral. Be careful - * not to cause performance problems with JTAG; would it - * suffice to loop over dap_queue_ap_read(), or would that - * be slower when JTAG is the chosen transport? - */ + retval = dap_setup_accessport_tar(dap, address); + if (retval != ERROR_OK) + return retval; - /* Scan out first read */ - retval = adi_jtag_dp_scan(dap, JTAG_DP_APACC, AP_REG_DRW, - DPAP_READ, 0, NULL, NULL); - if (retval != ERROR_OK) - return retval; - for (readcount = 0; readcount < blocksize - 1; readcount++) - { - /* Scan out next read; scan in posted value for the - * previous one. Assumes read is acked "OK/FAULT", - * and CTRL_STAT says that meant "OK". - */ - retval = adi_jtag_dp_scan(dap, JTAG_DP_APACC, AP_REG_DRW, - DPAP_READ, 0, buffer + 4 * readcount, - &dap->ack); - if (retval != ERROR_OK) - return retval; + /* Queue up all reads. Each read will store the entire DRW word in the read buffer. How many + * useful bytes it contains, and their location in the word, depends on the type of transfer + * and alignment. */ + while (nbytes > 0) { + uint32_t this_size = size; + + /* Select packed transfer if possible */ + if (addrinc && dap->packed_transfers && nbytes >= 4 + && max_tar_block_size(dap->tar_autoincr_block, address) >= 4) { + this_size = 4; + retval = dap_setup_accessport_csw(dap, csw_size | CSW_ADDRINC_PACKED); + } else { + retval = dap_setup_accessport_csw(dap, csw_size | csw_addrincr); } - - /* Scan in last posted value; RDBUFF has no other effect, - * assuming ack is OK/FAULT and CTRL_STAT says "OK". - */ - retval = adi_jtag_dp_scan(dap, JTAG_DP_DPACC, DP_RDBUFF, - DPAP_READ, 0, buffer + 4 * readcount, - &dap->ack); if (retval != ERROR_OK) - return retval; - - retval = dap_run(dap); - if (retval != ERROR_OK) - { - errorcount++; - if (errorcount <= 1) - { - /* try again */ - continue; - } - LOG_WARNING("Block read error address 0x%" PRIx32, address); - return retval; - } - wcount = wcount - blocksize; - address += 4 * blocksize; - buffer += 4 * blocksize; - } - - /* if we have an unaligned access - reorder data */ - if (adr & 0x3u) - { - for (readcount = 0; readcount < count; readcount++) - { - int i; - uint32_t data; - memcpy(&data, pBuffer, sizeof(uint32_t)); - - for (i = 0; i < 4; i++) - { - *((uint8_t*)pBuffer) = - (data >> 8 * (adr & 0x3)); - pBuffer++; - adr++; - } - } - } - - return retval; -} - -static int mem_ap_read_buf_packed_u16(struct adiv5_dap *dap, - uint8_t *buffer, int count, uint32_t address) -{ - uint32_t invalue; - int retval = ERROR_OK; - int wcount, blocksize, readcount, i; - - wcount = count >> 1; - - while (wcount > 0) - { - int nbytes; - - /* Adjust to read blocks within boundaries aligned to the TAR autoincremnent size*/ - blocksize = max_tar_block_size(dap->tar_autoincr_block, address); - if (wcount < blocksize) - blocksize = wcount; + break; - retval = dap_setup_accessport(dap, CSW_16BIT | CSW_ADDRINC_PACKED, address); + retval = dap_queue_ap_read(dap, AP_REG_DRW, read_ptr++); if (retval != ERROR_OK) - return retval; + break; - /* handle unaligned data at 4k boundary */ - if (blocksize == 0) - blocksize = 1; - readcount = blocksize; + nbytes -= this_size; + address += this_size; - do - { - retval = dap_queue_ap_read(dap, AP_REG_DRW, &invalue); + /* Rewrite TAR if it wrapped */ + if (addrinc && address % dap->tar_autoincr_block < size && nbytes > 0) { + retval = dap_setup_accessport_tar(dap, address); if (retval != ERROR_OK) - return retval; - if ((retval = dap_run(dap)) != ERROR_OK) - { - LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count); - return retval; - } - - nbytes = MIN((readcount << 1), 4); - - for (i = 0; i < nbytes; i++) - { - *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3)); - buffer++; - address++; - } - - readcount -= (nbytes >> 1); - } while (readcount); - wcount -= blocksize; + break; + } } - return retval; -} - -/** - * Synchronously read a block of 16-bit halfwords into a buffer - * @param dap The DAP connected to the MEM-AP. - * @param buffer where the halfwords will be stored (in host byte order). - * @param count How many halfwords to read. - * @param address Memory address from which to read words; all the - * words must be readable by the currently selected MEM-AP. - */ -int mem_ap_read_buf_u16(struct adiv5_dap *dap, uint8_t *buffer, - int count, uint32_t address) -{ - uint32_t invalue, i; - int retval = ERROR_OK; - - if (count >= 4) - return mem_ap_read_buf_packed_u16(dap, buffer, count, address); - - while (count > 0) - { - retval = dap_setup_accessport(dap, CSW_16BIT | CSW_ADDRINC_SINGLE, address); - if (retval != ERROR_OK) - return retval; - retval = dap_queue_ap_read(dap, AP_REG_DRW, &invalue); - if (retval != ERROR_OK) - break; - + if (retval == ERROR_OK) retval = dap_run(dap); - if (retval != ERROR_OK) - break; - if (address & 0x1) - { - for (i = 0; i < 2; i++) - { - *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3)); - buffer++; - address++; - } + /* Restore state */ + address = adr; + nbytes = size * count; + read_ptr = read_buf; + + /* If something failed, read TAR to find out how much data was successfully read, so we can + * at least give the caller what we have. */ + if (retval != ERROR_OK) { + uint32_t tar; + if (dap_queue_ap_read(dap, AP_REG_TAR, &tar) == ERROR_OK + && dap_run(dap) == ERROR_OK) { + LOG_ERROR("Failed to read memory at 0x%08"PRIx32, tar); + if (nbytes > tar - address) + nbytes = tar - address; + } else { + LOG_ERROR("Failed to read memory and, additionally, failed to find out where"); + nbytes = 0; } - else - { - uint16_t svalue = (invalue >> 8 * (address & 0x3)); - memcpy(buffer, &svalue, sizeof(uint16_t)); - address += 2; - buffer += 2; - } - count -= 2; } - return retval; -} + /* Replay loop to populate caller's buffer from the correct word and byte lane */ + while (nbytes > 0) { + uint32_t this_size = size; -/* FIX!!! is this a potential performance bottleneck w.r.t. requiring too many - * roundtrips when jtag_execute_queue() has a large overhead(e.g. for USB)s? - * - * The solution is to arrange for a large out/in scan in this loop and - * and convert data afterwards. - */ -static int mem_ap_read_buf_packed_u8(struct adiv5_dap *dap, - uint8_t *buffer, int count, uint32_t address) -{ - uint32_t invalue; - int retval = ERROR_OK; - int wcount, blocksize, readcount, i; - - wcount = count; - - while (wcount > 0) - { - int nbytes; - - /* Adjust to read blocks within boundaries aligned to the TAR autoincremnent size*/ - blocksize = max_tar_block_size(dap->tar_autoincr_block, address); - - if (wcount < blocksize) - blocksize = wcount; - - retval = dap_setup_accessport(dap, CSW_8BIT | CSW_ADDRINC_PACKED, address); - if (retval != ERROR_OK) - return retval; - readcount = blocksize; - - do - { - retval = dap_queue_ap_read(dap, AP_REG_DRW, &invalue); - if (retval != ERROR_OK) - return retval; - if ((retval = dap_run(dap)) != ERROR_OK) - { - LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count); - return retval; - } - - nbytes = MIN(readcount, 4); - - for (i = 0; i < nbytes; i++) - { - *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3)); - buffer++; - address++; - } - - readcount -= nbytes; - } while (readcount); - wcount -= blocksize; - } - - return retval; -} - -/** - * Synchronously read a block of bytes into a buffer - * @param dap The DAP connected to the MEM-AP. - * @param buffer where the bytes will be stored. - * @param count How many bytes to read. - * @param address Memory address from which to read data; all the - * data must be readable by the currently selected MEM-AP. - */ -int mem_ap_read_buf_u8(struct adiv5_dap *dap, uint8_t *buffer, - int count, uint32_t address) -{ - uint32_t invalue; - int retval = ERROR_OK; - - if (count >= 4) - return mem_ap_read_buf_packed_u8(dap, buffer, count, address); + if (addrinc && dap->packed_transfers && nbytes >= 4 + && max_tar_block_size(dap->tar_autoincr_block, address) >= 4) { + this_size = 4; + } - while (count > 0) - { - retval = dap_setup_accessport(dap, CSW_8BIT | CSW_ADDRINC_SINGLE, address); - if (retval != ERROR_OK) - return retval; - retval = dap_queue_ap_read(dap, AP_REG_DRW, &invalue); - if (retval != ERROR_OK) - return retval; - retval = dap_run(dap); - if (retval != ERROR_OK) - break; + switch (this_size) { + case 4: + *buffer++ = *read_ptr >> 8 * (address++ & 3); + *buffer++ = *read_ptr >> 8 * (address++ & 3); + case 2: + *buffer++ = *read_ptr >> 8 * (address++ & 3); + case 1: + *buffer++ = *read_ptr >> 8 * (address++ & 3); + } - *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3)); - count--; - address++; - buffer++; + read_ptr++; + nbytes -= this_size; } + free(read_buf); return retval; } @@ -913,46 +525,32 @@ int mem_ap_sel_write_atomic_u32(struct adiv5_dap *swjdp, uint8_t ap, return mem_ap_write_atomic_u32(swjdp, address, value); } -int mem_ap_sel_read_buf_u8(struct adiv5_dap *swjdp, uint8_t ap, - uint8_t *buffer, int count, uint32_t address) +int mem_ap_sel_read_buf(struct adiv5_dap *swjdp, uint8_t ap, + uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address) { dap_ap_select(swjdp, ap); - return mem_ap_read_buf_u8(swjdp, buffer, count, address); + return mem_ap_read(swjdp, buffer, size, count, address, true); } -int mem_ap_sel_read_buf_u16(struct adiv5_dap *swjdp, uint8_t ap, - uint8_t *buffer, int count, uint32_t address) +int mem_ap_sel_write_buf(struct adiv5_dap *swjdp, uint8_t ap, + const uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address) { dap_ap_select(swjdp, ap); - return mem_ap_read_buf_u16(swjdp, buffer, count, address); + return mem_ap_write(swjdp, buffer, size, count, address, true); } -int mem_ap_sel_read_buf_u32(struct adiv5_dap *swjdp, uint8_t ap, - uint8_t *buffer, int count, uint32_t address) +int mem_ap_sel_read_buf_noincr(struct adiv5_dap *swjdp, uint8_t ap, + uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address) { dap_ap_select(swjdp, ap); - return mem_ap_read_buf_u32(swjdp, buffer, count, address); + return mem_ap_read(swjdp, buffer, size, count, address, false); } -int mem_ap_sel_write_buf_u8(struct adiv5_dap *swjdp, uint8_t ap, - const uint8_t *buffer, int count, uint32_t address) +int mem_ap_sel_write_buf_noincr(struct adiv5_dap *swjdp, uint8_t ap, + const uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address) { dap_ap_select(swjdp, ap); - return mem_ap_write_buf_u8(swjdp, buffer, count, address); -} - -int mem_ap_sel_write_buf_u16(struct adiv5_dap *swjdp, uint8_t ap, - const uint8_t *buffer, int count, uint32_t address) -{ - dap_ap_select(swjdp, ap); - return mem_ap_write_buf_u16(swjdp, buffer, count, address); -} - -int mem_ap_sel_write_buf_u32(struct adiv5_dap *swjdp, uint8_t ap, - const uint8_t *buffer, int count, uint32_t address) -{ - dap_ap_select(swjdp, ap); - return mem_ap_write_buf_u32(swjdp, buffer, count, address); + return mem_ap_write(swjdp, buffer, size, count, address, false); } #define MDM_REG_STAT 0x00 @@ -982,6 +580,8 @@ int mem_ap_sel_write_buf_u32(struct adiv5_dap *swjdp, uint8_t ap, #define MEM_CTRL_VLLSX_DBG_ACK (1<<6) #define MEM_CTRL_VLLSX_STAT_ACK (1<<7) +#define MDM_ACCESS_TIMEOUT 3000 /* ms */ + /** * */ @@ -989,6 +589,7 @@ int dap_syssec_kinetis_mdmap(struct adiv5_dap *dap) { uint32_t val; int retval; + int timeout = 0; enum reset_types jtag_reset_config = jtag_get_reset_config(); dap_ap_select(dap, 1); @@ -999,9 +600,8 @@ int dap_syssec_kinetis_mdmap(struct adiv5_dap *dap) return retval; dap_run(dap); - if ( val != 0x001C0000 ) - { - LOG_DEBUG("id doesn't match %08X != 0x001C0000",val); + if (val != 0x001C0000) { + LOG_DEBUG("id doesn't match %08" PRIX32 " != 0x001C0000", val); dap_ap_select(dap, 0); return ERROR_FAIL; } @@ -1010,45 +610,43 @@ int dap_syssec_kinetis_mdmap(struct adiv5_dap *dap) * it's important that the device is out of * reset here */ - retval = dap_queue_ap_read(dap, MDM_REG_STAT, &val); - if (retval != ERROR_OK) - return retval; - dap_run(dap); + while (1) { + if (timeout++ > MDM_ACCESS_TIMEOUT) { + LOG_DEBUG("MDMAP : flash ready timeout"); + return ERROR_FAIL; + } + retval = dap_queue_ap_read(dap, MDM_REG_STAT, &val); + if (retval != ERROR_OK) + return retval; + dap_run(dap); - LOG_DEBUG("MDM_REG_STAT %08X",val); + LOG_DEBUG("MDM_REG_STAT %08" PRIX32, val); + if (val & MDM_STAT_FREADY) + break; + alive_sleep(1); + } - if ( (val & (MDM_STAT_SYSSEC|MDM_STAT_FREADY)) != (MDM_STAT_FREADY) ) - { + if ((val & MDM_STAT_SYSSEC)) { LOG_DEBUG("MDMAP: system is secured, masserase needed"); - if ( !(val & MDM_STAT_FMEEN) ) - { + if (!(val & MDM_STAT_FMEEN)) LOG_DEBUG("MDMAP: masserase is disabled"); - } - else - { + else { /* we need to assert reset */ - if ( jtag_reset_config & RESET_HAS_SRST ) - { + if (jtag_reset_config & RESET_HAS_SRST) { /* default to asserting srst */ - if (jtag_reset_config & RESET_SRST_PULLS_TRST) - { - jtag_add_reset(1, 1); - } - else - { - jtag_add_reset(0, 1); - } - } - else - { + adapter_assert_reset(); + } else { LOG_DEBUG("SRST not configured"); dap_ap_select(dap, 0); return ERROR_FAIL; } - - while(1) - { + timeout = 0; + while (1) { + if (timeout++ > MDM_ACCESS_TIMEOUT) { + LOG_DEBUG("MDMAP : flash ready timeout"); + return ERROR_FAIL; + } retval = dap_queue_ap_write(dap, MDM_REG_CTRL, MEM_CTRL_FMEIP); if (retval != ERROR_OK) return retval; @@ -1058,14 +656,18 @@ int dap_syssec_kinetis_mdmap(struct adiv5_dap *dap) if (retval != ERROR_OK) return retval; dap_run(dap); - LOG_DEBUG("MDM_REG_STAT %08X",val); + LOG_DEBUG("MDM_REG_STAT %08" PRIX32, val); - if ( (val&1)) + if ((val & 1)) break; + alive_sleep(1); } - - while(1) - { + timeout = 0; + while (1) { + if (timeout++ > MDM_ACCESS_TIMEOUT) { + LOG_DEBUG("MDMAP : flash ready timeout"); + return ERROR_FAIL; + } retval = dap_queue_ap_write(dap, MDM_REG_CTRL, 0); if (retval != ERROR_OK) return retval; @@ -1075,16 +677,17 @@ int dap_syssec_kinetis_mdmap(struct adiv5_dap *dap) if (retval != ERROR_OK) return retval; dap_run(dap); - LOG_DEBUG("MDM_REG_STAT %08X",val); + LOG_DEBUG("MDM_REG_STAT %08" PRIX32, val); /* read control register and wait for ready */ retval = dap_queue_ap_read(dap, MDM_REG_CTRL, &val); if (retval != ERROR_OK) return retval; dap_run(dap); - LOG_DEBUG("MDM_REG_CTRL %08X",val); + LOG_DEBUG("MDM_REG_CTRL %08" PRIX32, val); - if ( val == 0x00 ) + if (val == 0x00) break; + alive_sleep(1); } } } @@ -1107,7 +710,6 @@ static struct dap_syssec_filter dap_syssec_filter_data[] = { { 0x4BA00477, dap_syssec_kinetis_mdmap } }; - /** * */ @@ -1116,15 +718,12 @@ int dap_syssec(struct adiv5_dap *dap) unsigned int i; struct jtag_tap *tap; - for(i=0;ijtag_info->tap; - while (tap != NULL) - { - if ( tap->hasidcode && (dap_syssec_filter_data[i].idcode == tap->idcode) ) - { - LOG_DEBUG("DAP: mdmap_init for idcode: %08x",tap->idcode); + while (tap != NULL) { + if (tap->hasidcode && (dap_syssec_filter_data[i].idcode == tap->idcode)) { + LOG_DEBUG("DAP: mdmap_init for idcode: %08" PRIx32, tap->idcode); dap_syssec_filter_data[i].dap_init(dap); } tap = tap->next_tap; @@ -1202,28 +801,29 @@ int ahbap_debugport_init(struct adiv5_dap *dap) retval = dap_queue_dp_read(dap, DP_CTRL_STAT, &ctrlstat); if (retval != ERROR_OK) return retval; - if ((retval = dap_run(dap)) != ERROR_OK) + retval = dap_run(dap); + if (retval != ERROR_OK) return retval; /* Check that we have debug power domains activated */ - while (!(ctrlstat & CDBGPWRUPACK) && (cnt++ < 10)) - { + while (!(ctrlstat & CDBGPWRUPACK) && (cnt++ < 10)) { LOG_DEBUG("DAP: wait CDBGPWRUPACK"); retval = dap_queue_dp_read(dap, DP_CTRL_STAT, &ctrlstat); if (retval != ERROR_OK) return retval; - if ((retval = dap_run(dap)) != ERROR_OK) + retval = dap_run(dap); + if (retval != ERROR_OK) return retval; alive_sleep(10); } - while (!(ctrlstat & CSYSPWRUPACK) && (cnt++ < 10)) - { + while (!(ctrlstat & CSYSPWRUPACK) && (cnt++ < 10)) { LOG_DEBUG("DAP: wait CSYSPWRUPACK"); retval = dap_queue_dp_read(dap, DP_CTRL_STAT, &ctrlstat); if (retval != ERROR_OK) return retval; - if ((retval = dap_run(dap)) != ERROR_OK) + retval = dap_run(dap); + if (retval != ERROR_OK) return retval; alive_sleep(10); } @@ -1242,27 +842,103 @@ int ahbap_debugport_init(struct adiv5_dap *dap) dap_syssec(dap); + /* check that we support packed transfers */ + uint32_t csw; + + retval = dap_setup_accessport(dap, CSW_8BIT | CSW_ADDRINC_PACKED, 0); + if (retval != ERROR_OK) + return retval; + + retval = dap_queue_ap_read(dap, AP_REG_CSW, &csw); + if (retval != ERROR_OK) + return retval; + + retval = dap_run(dap); + if (retval != ERROR_OK) + return retval; + + if (csw & CSW_ADDRINC_PACKED) + dap->packed_transfers = true; + else + dap->packed_transfers = false; + + LOG_DEBUG("MEM_AP Packed Transfers: %s", + dap->packed_transfers ? "enabled" : "disabled"); + return ERROR_OK; } /* CID interpretation -- see ARM IHI 0029B section 3 * and ARM IHI 0031A table 13-3. */ -static const char *class_description[16] ={ +static const char *class_description[16] = { "Reserved", "ROM table", "Reserved", "Reserved", "Reserved", "Reserved", "Reserved", "Reserved", "Reserved", "CoreSight component", "Reserved", "Peripheral Test Block", "Reserved", "OptimoDE DESS", - "Generic IP component", "PrimeCell or System component" + "Generic IP component", "PrimeCell or System component" }; -static bool -is_dap_cid_ok(uint32_t cid3, uint32_t cid2, uint32_t cid1, uint32_t cid0) +static bool is_dap_cid_ok(uint32_t cid3, uint32_t cid2, uint32_t cid1, uint32_t cid0) { return cid3 == 0xb1 && cid2 == 0x05 && ((cid1 & 0x0f) == 0) && cid0 == 0x0d; } +/* + * This function checks the ID for each access port to find the requested Access Port type + */ +int dap_find_ap(struct adiv5_dap *dap, enum ap_type type_to_find, uint8_t *ap_num_out) +{ + int ap; + + /* Maximum AP number is 255 since the SELECT register is 8 bits */ + for (ap = 0; ap <= 255; ap++) { + + /* read the IDR register of the Access Port */ + uint32_t id_val = 0; + dap_ap_select(dap, ap); + + int retval = dap_queue_ap_read(dap, AP_REG_IDR, &id_val); + if (retval != ERROR_OK) + return retval; + + retval = dap_run(dap); + + /* IDR bits: + * 31-28 : Revision + * 27-24 : JEDEC bank (0x4 for ARM) + * 23-17 : JEDEC code (0x3B for ARM) + * 16 : Mem-AP + * 15-8 : Reserved + * 7-0 : AP Identity (1=AHB-AP 2=APB-AP 0x10=JTAG-AP) + */ + + /* Reading register for a non-existant AP should not cause an error, + * but just to be sure, try to continue searching if an error does happen. + */ + if ((retval == ERROR_OK) && /* Register read success */ + ((id_val & 0x0FFF0000) == 0x04770000) && /* Jedec codes match */ + ((id_val & 0xFF) == type_to_find)) { /* type matches*/ + + LOG_DEBUG("Found %s at AP index: %d (IDR=0x%08" PRIX32 ")", + (type_to_find == AP_TYPE_AHB_AP) ? "AHB-AP" : + (type_to_find == AP_TYPE_APB_AP) ? "APB-AP" : + (type_to_find == AP_TYPE_JTAG_AP) ? "JTAG-AP" : "Unknown", + ap, id_val); + + *ap_num_out = ap; + return ERROR_OK; + } + } + + LOG_DEBUG("No %s found", + (type_to_find == AP_TYPE_AHB_AP) ? "AHB-AP" : + (type_to_find == AP_TYPE_APB_AP) ? "APB-AP" : + (type_to_find == AP_TYPE_JTAG_AP) ? "JTAG-AP" : "Unknown"); + return ERROR_FAIL; +} + int dap_get_debugbase(struct adiv5_dap *dap, int ap, uint32_t *out_dbgbase, uint32_t *out_apid) { @@ -1272,7 +948,7 @@ int dap_get_debugbase(struct adiv5_dap *dap, int ap, /* AP address is in bits 31:24 of DP_SELECT */ if (ap >= 256) - return ERROR_INVALID_ARGUMENTS; + return ERROR_COMMAND_SYNTAX_ERROR; ap_old = dap->ap_current; dap_ap_select(dap, ap); @@ -1315,13 +991,12 @@ int dap_lookup_cs_component(struct adiv5_dap *dap, int ap, int retval = ERROR_FAIL; if (ap >= 256) - return ERROR_INVALID_ARGUMENTS; + return ERROR_COMMAND_SYNTAX_ERROR; ap_old = dap->ap_current; dap_ap_select(dap, ap); - do - { + do { retval = mem_ap_read_atomic_u32(dap, (dbgbase&0xFFFFF000) | entry_offset, &romentry); if (retval != ERROR_OK) @@ -1334,6 +1009,8 @@ int dap_lookup_cs_component(struct adiv5_dap *dap, int ap, retval = mem_ap_read_atomic_u32(dap, (component_base & 0xfffff000) | 0xfcc, &devtype); + if (retval != ERROR_OK) + return retval; if ((devtype & 0xff) == type) { *addr = component_base; retval = ERROR_OK; @@ -1352,7 +1029,7 @@ static int dap_info_command(struct command_context *cmd_ctx, struct adiv5_dap *dap, int ap) { int retval; - uint32_t dbgbase, apid; + uint32_t dbgbase = 0, apid = 0; /* Silence gcc by initializing */ int romtable_present = 0; uint8_t mem_ap; uint32_t ap_old; @@ -1367,10 +1044,8 @@ static int dap_info_command(struct command_context *cmd_ctx, /* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */ mem_ap = ((apid&0x10000) && ((apid&0x0F) != 0)); command_print(cmd_ctx, "AP ID register 0x%8.8" PRIx32, apid); - if (apid) - { - switch (apid&0x0F) - { + if (apid) { + switch (apid&0x0F) { case 0: command_print(cmd_ctx, "\tType is JTAG-AP"); break; @@ -1389,18 +1064,13 @@ static int dap_info_command(struct command_context *cmd_ctx, * not a ROM table ... or have no such components at all. */ if (mem_ap) - command_print(cmd_ctx, "AP BASE 0x%8.8" PRIx32, - dbgbase); - } - else - { + command_print(cmd_ctx, "AP BASE 0x%8.8" PRIx32, dbgbase); + } else command_print(cmd_ctx, "No AP found at this ap 0x%x", ap); - } romtable_present = ((mem_ap) && (dbgbase != 0xFFFFFFFF)); - if (romtable_present) - { - uint32_t cid0,cid1,cid2,cid3,memtype,romentry; + if (romtable_present) { + uint32_t cid0, cid1, cid2, cid3, memtype, romentry; uint16_t entry_offset; /* bit 16 of apid indicates a memory access port */ @@ -1444,78 +1114,61 @@ static int dap_info_command(struct command_context *cmd_ctx, /* Now we read ROM table entries from dbgbase&0xFFFFF000) | 0x000 until we get 0x00000000 */ entry_offset = 0; - do - { + do { retval = mem_ap_read_atomic_u32(dap, (dbgbase&0xFFFFF000) | entry_offset, &romentry); if (retval != ERROR_OK) return retval; - command_print(cmd_ctx, "\tROMTABLE[0x%x] = 0x%" PRIx32 "",entry_offset,romentry); - if (romentry&0x01) - { + command_print(cmd_ctx, "\tROMTABLE[0x%x] = 0x%" PRIx32 "", entry_offset, romentry); + if (romentry & 0x01) { uint32_t c_cid0, c_cid1, c_cid2, c_cid3; uint32_t c_pid0, c_pid1, c_pid2, c_pid3, c_pid4; uint32_t component_base; unsigned part_num; char *type, *full; - component_base = (dbgbase & 0xFFFFF000) - + (romentry & 0xFFFFF000); + component_base = (dbgbase & 0xFFFFF000) + (romentry & 0xFFFFF000); /* IDs are in last 4K section */ - - - retval = mem_ap_read_atomic_u32(dap, - component_base + 0xFE0, &c_pid0); + retval = mem_ap_read_atomic_u32(dap, component_base + 0xFE0, &c_pid0); if (retval != ERROR_OK) return retval; c_pid0 &= 0xff; - retval = mem_ap_read_atomic_u32(dap, - component_base + 0xFE4, &c_pid1); + retval = mem_ap_read_atomic_u32(dap, component_base + 0xFE4, &c_pid1); if (retval != ERROR_OK) return retval; c_pid1 &= 0xff; - retval = mem_ap_read_atomic_u32(dap, - component_base + 0xFE8, &c_pid2); + retval = mem_ap_read_atomic_u32(dap, component_base + 0xFE8, &c_pid2); if (retval != ERROR_OK) return retval; c_pid2 &= 0xff; - retval = mem_ap_read_atomic_u32(dap, - component_base + 0xFEC, &c_pid3); + retval = mem_ap_read_atomic_u32(dap, component_base + 0xFEC, &c_pid3); if (retval != ERROR_OK) return retval; c_pid3 &= 0xff; - retval = mem_ap_read_atomic_u32(dap, - component_base + 0xFD0, &c_pid4); + retval = mem_ap_read_atomic_u32(dap, component_base + 0xFD0, &c_pid4); if (retval != ERROR_OK) return retval; c_pid4 &= 0xff; - retval = mem_ap_read_atomic_u32(dap, - component_base + 0xFF0, &c_cid0); + retval = mem_ap_read_atomic_u32(dap, component_base + 0xFF0, &c_cid0); if (retval != ERROR_OK) return retval; c_cid0 &= 0xff; - retval = mem_ap_read_atomic_u32(dap, - component_base + 0xFF4, &c_cid1); + retval = mem_ap_read_atomic_u32(dap, component_base + 0xFF4, &c_cid1); if (retval != ERROR_OK) return retval; c_cid1 &= 0xff; - retval = mem_ap_read_atomic_u32(dap, - component_base + 0xFF8, &c_cid2); + retval = mem_ap_read_atomic_u32(dap, component_base + 0xFF8, &c_cid2); if (retval != ERROR_OK) return retval; c_cid2 &= 0xff; - retval = mem_ap_read_atomic_u32(dap, - component_base + 0xFFC, &c_cid3); + retval = mem_ap_read_atomic_u32(dap, component_base + 0xFFC, &c_cid3); if (retval != ERROR_OK) return retval; c_cid3 &= 0xff; - - command_print(cmd_ctx, - "\t\tComponent base address 0x%" PRIx32 - ", start address 0x%" PRIx32, - component_base, + command_print(cmd_ctx, "\t\tComponent base address 0x%" PRIx32 "," + "start address 0x%" PRIx32, component_base, /* component may take multiple 4K pages */ component_base - 0x1000*(c_pid4 >> 4)); command_print(cmd_ctx, "\t\tComponent class is 0x%x, %s", @@ -1638,7 +1291,7 @@ static int dap_info_command(struct command_context *cmd_ctx, if (!is_dap_cid_ok(cid3, cid2, cid1, cid0)) command_print(cmd_ctx, - "\t\tCID3 0%2.2x" + "\t\tCID3 0%2.2x" ", CID2 0%2.2x" ", CID1 0%2.2x" ", CID0 0%2.2x", @@ -1677,11 +1330,15 @@ static int dap_info_command(struct command_context *cmd_ctx, type = "Cortex-M3 FBP"; full = "(Flash Patch and Breakpoint)"; break; + case 0x00c: + type = "Cortex-M4 SCS"; + full = "(System Control Space)"; + break; case 0x00d: type = "CoreSight ETM11"; full = "(Embedded Trace)"; break; - // case 0x113: what? + /* case 0x113: what? */ case 0x120: /* from OMAP3 memmap */ type = "TI SDTI"; full = "(System Debug Trace Interface)"; @@ -1726,10 +1383,18 @@ static int dap_info_command(struct command_context *cmd_ctx, type = "Cortex-M3 ETM"; full = "(Embedded Trace)"; break; + case 0x925: + type = "Cortex-M4 ETM"; + full = "(Embedded Trace)"; + break; case 0x930: type = "Cortex-R4 ETM"; full = "(Embedded Trace)"; break; + case 0x9a1: + type = "Cortex-M4 TPUI"; + full = "(Trace Port Interface Unit)"; + break; case 0xc08: type = "Cortex-A8 Debug"; full = "(Debug Unit)"; @@ -1741,9 +1406,7 @@ static int dap_info_command(struct command_context *cmd_ctx, } command_print(cmd_ctx, "\t\tPart is %s %s", type, full); - } - else - { + } else { if (romentry) command_print(cmd_ctx, "\t\tComponent not present"); else @@ -1751,11 +1414,8 @@ static int dap_info_command(struct command_context *cmd_ctx, } entry_offset += 4; } while (romentry > 0); - } - else - { + } else command_print(cmd_ctx, "\tNo ROM table present"); - } dap_ap_select(dap, ap_old); return ERROR_OK; @@ -1799,7 +1459,7 @@ COMMAND_HANDLER(dap_baseaddr_command) COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel); /* AP address is in bits 31:24 of DP_SELECT */ if (apsel >= 256) - return ERROR_INVALID_ARGUMENTS; + return ERROR_COMMAND_SYNTAX_ERROR; break; default: return ERROR_COMMAND_SYNTAX_ERROR; @@ -1867,7 +1527,7 @@ COMMAND_HANDLER(dap_apsel_command) COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel); /* AP address is in bits 31:24 of DP_SELECT */ if (apsel >= 256) - return ERROR_INVALID_ARGUMENTS; + return ERROR_COMMAND_SYNTAX_ERROR; break; default: return ERROR_COMMAND_SYNTAX_ERROR; @@ -1889,6 +1549,39 @@ COMMAND_HANDLER(dap_apsel_command) return retval; } +COMMAND_HANDLER(dap_apcsw_command) +{ + struct target *target = get_current_target(CMD_CTX); + struct arm *arm = target_to_arm(target); + struct adiv5_dap *dap = arm->dap; + + uint32_t apcsw = dap->apcsw[dap->apsel], sprot = 0; + + switch (CMD_ARGC) { + case 0: + command_print(CMD_CTX, "apsel %" PRIi32 " selected, csw 0x%8.8" PRIx32, + (dap->apsel), apcsw); + break; + case 1: + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], sprot); + /* AP address is in bits 31:24 of DP_SELECT */ + if (sprot > 1) + return ERROR_COMMAND_SYNTAX_ERROR; + if (sprot) + apcsw |= CSW_SPROT; + else + apcsw &= ~CSW_SPROT; + break; + default: + return ERROR_COMMAND_SYNTAX_ERROR; + } + dap->apcsw[dap->apsel] = apcsw; + + return 0; +} + + + COMMAND_HANDLER(dap_apid_command) { struct target *target = get_current_target(CMD_CTX); @@ -1906,7 +1599,7 @@ COMMAND_HANDLER(dap_apid_command) COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel); /* AP address is in bits 31:24 of DP_SELECT */ if (apsel >= 256) - return ERROR_INVALID_ARGUMENTS; + return ERROR_COMMAND_SYNTAX_ERROR; break; default: return ERROR_COMMAND_SYNTAX_ERROR; @@ -1943,6 +1636,14 @@ static const struct command_registration dap_commands[] = { "and display the result", .usage = "[ap_num]", }, + { + .name = "apcsw", + .handler = dap_apcsw_command, + .mode = COMMAND_EXEC, + .help = "Set csw access bit ", + .usage = "[sprot]", + }, + { .name = "apid", .handler = dap_apid_command, @@ -1975,9 +1676,8 @@ const struct command_registration dap_command_handlers[] = { .name = "dap", .mode = COMMAND_EXEC, .help = "DAP command group", + .usage = "", .chain = dap_commands, }, COMMAND_REGISTRATION_DONE }; - -