X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm966e.c;h=98c62745f26d086a966981ea2903e135061190f7;hp=e4bfe57328b6859ee1ed5e3dfe9de6fc6f062c77;hb=6a453e5cf0adc4d19378e953122ca69efcf32b6d;hpb=a4a2808c2a849eddd5d7d454c048ffdfd89ca9c6
diff --git a/src/target/arm966e.c b/src/target/arm966e.c
index e4bfe57328..98c62745f2 100644
--- a/src/target/arm966e.c
+++ b/src/target/arm966e.c
@@ -16,10 +16,9 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ * along with this program. If not, see . *
***************************************************************************/
+
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
@@ -28,7 +27,6 @@
#include "target_type.h"
#include "arm_opcodes.h"
-
#if 0
#define _DEBUG_INSTRUCTION_EXECUTION_
#endif
@@ -53,21 +51,28 @@ int arm966e_init_arch_info(struct target *target, struct arm966e_common *arm966e
static int arm966e_target_create(struct target *target, Jim_Interp *interp)
{
- struct arm966e_common *arm966e = calloc(1,sizeof(struct arm966e_common));
+ struct arm966e_common *arm966e = calloc(1, sizeof(struct arm966e_common));
return arm966e_init_arch_info(target, arm966e, target->tap);
}
-static int arm966e_verify_pointer(struct command_context *cmd_ctx,
+static int arm966e_verify_pointer(struct command_invocation *cmd,
struct arm966e_common *arm966e)
{
if (arm966e->common_magic != ARM966E_COMMON_MAGIC) {
- command_print(cmd_ctx, "target is not an ARM966");
+ command_print(cmd->ctx, "target is not an ARM966");
return ERROR_TARGET_INVALID;
}
return ERROR_OK;
}
+/*
+ * REVISIT: The "read_cp15" and "write_cp15" commands could hook up
+ * to eventual mrc() and mcr() routines ... the reg_addr values being
+ * constructed (for CP15 only) from Opcode_1, Opcode_2, and CRn values.
+ * See section 7.3 of the ARM966E-S TRM.
+ */
+
static int arm966e_read_cp15(struct target *target, int reg_addr, uint32_t *value)
{
int retval = ERROR_OK;
@@ -77,49 +82,48 @@ static int arm966e_read_cp15(struct target *target, int reg_addr, uint32_t *valu
uint8_t reg_addr_buf = reg_addr & 0x3f;
uint8_t nr_w_buf = 0;
- jtag_set_end_state(TAP_IDLE);
- if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
- {
+ retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
return retval;
- }
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
- fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
+ /* REVISIT: table 7-2 shows that bits 31-31 need to be
+ * specified for accessing BIST registers ...
+ */
fields[0].out_value = NULL;
fields[0].in_value = NULL;
- fields[1].tap = jtag_info->tap;
fields[1].num_bits = 6;
fields[1].out_value = ®_addr_buf;
fields[1].in_value = NULL;
- fields[2].tap = jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = &nr_w_buf;
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_get_end_state());
+ jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
fields[1].in_value = (uint8_t *)value;
- jtag_add_dr_scan(3, fields, jtag_get_end_state());
+ jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
- if ((retval = jtag_execute_queue()) != ERROR_OK)
- {
+ retval = jtag_execute_queue();
+ if (retval != ERROR_OK)
return retval;
- }
LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
#endif
return ERROR_OK;
}
-// EXPORTED to str9x (flash)
+/* EXPORTED to str9x (flash) */
int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value)
{
int retval = ERROR_OK;
@@ -132,29 +136,26 @@ int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value)
buf_set_u32(value_buf, 0, 32, value);
- jtag_set_end_state(TAP_IDLE);
- if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
- {
+ retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
return retval;
- }
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
- fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = value_buf;
fields[0].in_value = NULL;
- fields[1].tap = jtag_info->tap;
fields[1].num_bits = 6;
fields[1].out_value = ®_addr_buf;
fields[1].in_value = NULL;
- fields[2].tap = jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = &nr_w_buf;
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_get_end_state());
+ jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
@@ -169,46 +170,40 @@ COMMAND_HANDLER(arm966e_handle_cp15_command)
struct target *target = get_current_target(CMD_CTX);
struct arm966e_common *arm966e = target_to_arm966(target);
- retval = arm966e_verify_pointer(CMD_CTX, arm966e);
+ retval = arm966e_verify_pointer(CMD, arm966e);
if (retval != ERROR_OK)
return retval;
- if (target->state != TARGET_HALTED)
- {
+ if (target->state != TARGET_HALTED) {
command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
/* one or more argument, access a single register (write if second argument is given */
- if (CMD_ARGC >= 1)
- {
+ if (CMD_ARGC >= 1) {
uint32_t address;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
- if (CMD_ARGC == 1)
- {
+ if (CMD_ARGC == 1) {
uint32_t value;
- if ((retval = arm966e_read_cp15(target, address, &value)) != ERROR_OK)
- {
+ retval = arm966e_read_cp15(target, address, &value);
+ if (retval != ERROR_OK) {
command_print(CMD_CTX,
"couldn't access reg %" PRIi32,
address);
return ERROR_OK;
}
- if ((retval = jtag_execute_queue()) != ERROR_OK)
- {
+ retval = jtag_execute_queue();
+ if (retval != ERROR_OK)
return retval;
- }
command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32,
address, value);
- }
- else if (CMD_ARGC == 2)
- {
+ } else if (CMD_ARGC == 2) {
uint32_t value;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
- if ((retval = arm966e_write_cp15(target, address, value)) != ERROR_OK)
- {
+ retval = arm966e_write_cp15(target, address, value);
+ if (retval != ERROR_OK) {
command_print(CMD_CTX,
"couldn't access reg %" PRIi32,
address);
@@ -227,7 +222,7 @@ static const struct command_registration arm966e_exec_command_handlers[] = {
.name = "cp15",
.handler = arm966e_handle_cp15_command,
.mode = COMMAND_EXEC,
- .usage = " [value]",
+ .usage = "regnum [value]",
.help = "display/modify cp15 register",
},
COMMAND_REGISTRATION_DONE
@@ -241,18 +236,18 @@ const struct command_registration arm966e_command_handlers[] = {
.name = "arm966e",
.mode = COMMAND_ANY,
.help = "arm966e command group",
+ .usage = "",
.chain = arm966e_exec_command_handlers,
},
COMMAND_REGISTRATION_DONE
};
/** Holds methods for ARM966 targets. */
-struct target_type arm966e_target =
-{
+struct target_type arm966e_target = {
.name = "arm966e",
.poll = arm7_9_poll,
- .arch_state = armv4_5_arch_state,
+ .arch_state = arm_arch_state,
.target_request_data = arm7_9_target_request_data,
@@ -264,11 +259,11 @@ struct target_type arm966e_target =
.deassert_reset = arm7_9_deassert_reset,
.soft_reset_halt = arm7_9_soft_reset_halt,
- .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+ .get_gdb_arch = arm_get_gdb_arch,
+ .get_gdb_reg_list = arm_get_gdb_reg_list,
.read_memory = arm7_9_read_memory,
- .write_memory = arm7_9_write_memory,
- .bulk_write_memory = arm7_9_bulk_write_memory,
+ .write_memory = arm7_9_write_memory_opt,
.checksum_memory = arm_checksum_memory,
.blank_check_memory = arm_blank_check_memory,
@@ -284,4 +279,5 @@ struct target_type arm966e_target =
.target_create = arm966e_target_create,
.init_target = arm9tdmi_init_target,
.examine = arm7_9_examine,
+ .check_reset = arm7_9_check_reset,
};