X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm966e.c;h=98c62745f26d086a966981ea2903e135061190f7;hp=badcd4f226158e839adffbe70c00ddf216399567;hb=6a453e5cf0adc4d19378e953122ca69efcf32b6d;hpb=00e900f8a1dff8d0aeacc8cdded995e0abae37c5 diff --git a/src/target/arm966e.c b/src/target/arm966e.c index badcd4f226..98c62745f2 100644 --- a/src/target/arm966e.c +++ b/src/target/arm966e.c @@ -16,86 +16,28 @@ * GNU General Public License for more details. * * * * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + * along with this program. If not, see . * ***************************************************************************/ + #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "arm966e.h" #include "target_type.h" - +#include "arm_opcodes.h" #if 0 #define _DEBUG_INSTRUCTION_EXECUTION_ #endif -/* forward declarations */ -int arm966e_target_create(struct target_s *target, Jim_Interp *interp); -int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target); -int arm966e_quit(void); - -target_type_t arm966e_target = +int arm966e_init_arch_info(struct target *target, struct arm966e_common *arm966e, struct jtag_tap *tap) { - .name = "arm966e", - - .poll = arm7_9_poll, - .arch_state = armv4_5_arch_state, - - .target_request_data = arm7_9_target_request_data, - - .halt = arm7_9_halt, - .resume = arm7_9_resume, - .step = arm7_9_step, - - .assert_reset = arm7_9_assert_reset, - .deassert_reset = arm7_9_deassert_reset, - .soft_reset_halt = arm7_9_soft_reset_halt, - - .get_gdb_reg_list = armv4_5_get_gdb_reg_list, - - .read_memory = arm7_9_read_memory, - .write_memory = arm7_9_write_memory, - .bulk_write_memory = arm7_9_bulk_write_memory, - .checksum_memory = arm7_9_checksum_memory, - .blank_check_memory = arm7_9_blank_check_memory, - - .run_algorithm = armv4_5_run_algorithm, + struct arm7_9_common *arm7_9 = &arm966e->arm7_9_common; - .add_breakpoint = arm7_9_add_breakpoint, - .remove_breakpoint = arm7_9_remove_breakpoint, - .add_watchpoint = arm7_9_add_watchpoint, - .remove_watchpoint = arm7_9_remove_watchpoint, - - .register_commands = arm966e_register_commands, - .target_create = arm966e_target_create, - .init_target = arm966e_init_target, - .examine = arm9tdmi_examine, - .quit = arm966e_quit, -}; + /* initialize arm7/arm9 specific info (including armv4_5) */ + arm9tdmi_init_arch_info(target, arm7_9, tap); -int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target) -{ - arm9tdmi_init_target(cmd_ctx, target); - - return ERROR_OK; -} - -int arm966e_quit(void) -{ - return ERROR_OK; -} - -int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap_t *tap) -{ - arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common; - arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common; - - arm9tdmi_init_arch_info(target, arm9tdmi, tap); - - arm9tdmi->arch_info = arm966e; arm966e->common_magic = ARM966E_COMMON_MAGIC; /* The ARM966E-S implements the ARMv5TE architecture which @@ -107,141 +49,113 @@ int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap return ERROR_OK; } -int arm966e_target_create(struct target_s *target, Jim_Interp *interp) +static int arm966e_target_create(struct target *target, Jim_Interp *interp) { - arm966e_common_t *arm966e = calloc(1,sizeof(arm966e_common_t)); - - arm966e_init_arch_info(target, arm966e, target->tap); + struct arm966e_common *arm966e = calloc(1, sizeof(struct arm966e_common)); - return ERROR_OK; + return arm966e_init_arch_info(target, arm966e, target->tap); } -int arm966e_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm9tdmi_common_t **arm9tdmi_p, arm966e_common_t **arm966e_p) +static int arm966e_verify_pointer(struct command_invocation *cmd, + struct arm966e_common *arm966e) { - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9; - arm9tdmi_common_t *arm9tdmi; - arm966e_common_t *arm966e; - - if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) - { - return -1; + if (arm966e->common_magic != ARM966E_COMMON_MAGIC) { + command_print(cmd->ctx, "target is not an ARM966"); + return ERROR_TARGET_INVALID; } - - arm7_9 = armv4_5->arch_info; - if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC) - { - return -1; - } - - arm9tdmi = arm7_9->arch_info; - if (arm9tdmi->common_magic != ARM9TDMI_COMMON_MAGIC) - { - return -1; - } - - arm966e = arm9tdmi->arch_info; - if (arm966e->common_magic != ARM966E_COMMON_MAGIC) - { - return -1; - } - - *armv4_5_p = armv4_5; - *arm7_9_p = arm7_9; - *arm9tdmi_p = arm9tdmi; - *arm966e_p = arm966e; - return ERROR_OK; } -int arm966e_read_cp15(target_t *target, int reg_addr, uint32_t *value) +/* + * REVISIT: The "read_cp15" and "write_cp15" commands could hook up + * to eventual mrc() and mcr() routines ... the reg_addr values being + * constructed (for CP15 only) from Opcode_1, Opcode_2, and CRn values. + * See section 7.3 of the ARM966E-S TRM. + */ + +static int arm966e_read_cp15(struct target *target, int reg_addr, uint32_t *value) { int retval = ERROR_OK; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; - arm_jtag_t *jtag_info = &arm7_9->jtag_info; - scan_field_t fields[3]; + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + struct arm_jtag *jtag_info = &arm7_9->jtag_info; + struct scan_field fields[3]; uint8_t reg_addr_buf = reg_addr & 0x3f; uint8_t nr_w_buf = 0; - jtag_set_end_state(TAP_IDLE); - if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK) - { + retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE); + if (retval != ERROR_OK) + return retval; + retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_IDLE); + if (retval != ERROR_OK) return retval; - } - arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL); - fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; + /* REVISIT: table 7-2 shows that bits 31-31 need to be + * specified for accessing BIST registers ... + */ fields[0].out_value = NULL; fields[0].in_value = NULL; - fields[1].tap = jtag_info->tap; fields[1].num_bits = 6; fields[1].out_value = ®_addr_buf; fields[1].in_value = NULL; - fields[2].tap = jtag_info->tap; fields[2].num_bits = 1; fields[2].out_value = &nr_w_buf; fields[2].in_value = NULL; - jtag_add_dr_scan(3, fields, jtag_get_end_state()); + jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE); fields[1].in_value = (uint8_t *)value; - jtag_add_dr_scan(3, fields, jtag_get_end_state()); + jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE); jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value); #ifdef _DEBUG_INSTRUCTION_EXECUTION_ - if ((retval = jtag_execute_queue()) != ERROR_OK) - { + retval = jtag_execute_queue(); + if (retval != ERROR_OK) return retval; - } LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value); #endif return ERROR_OK; } -int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value) +/* EXPORTED to str9x (flash) */ +int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value) { int retval = ERROR_OK; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; - arm_jtag_t *jtag_info = &arm7_9->jtag_info; - scan_field_t fields[3]; + struct arm7_9_common *arm7_9 = target_to_arm7_9(target); + struct arm_jtag *jtag_info = &arm7_9->jtag_info; + struct scan_field fields[3]; uint8_t reg_addr_buf = reg_addr & 0x3f; uint8_t nr_w_buf = 1; uint8_t value_buf[4]; buf_set_u32(value_buf, 0, 32, value); - jtag_set_end_state(TAP_IDLE); - if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK) - { + retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE); + if (retval != ERROR_OK) + return retval; + retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_IDLE); + if (retval != ERROR_OK) return retval; - } - arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL); - fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = value_buf; fields[0].in_value = NULL; - fields[1].tap = jtag_info->tap; fields[1].num_bits = 6; fields[1].out_value = ®_addr_buf; fields[1].in_value = NULL; - fields[2].tap = jtag_info->tap; fields[2].num_bits = 1; fields[2].out_value = &nr_w_buf; fields[2].in_value = NULL; - jtag_add_dr_scan(3, fields, jtag_get_end_state()); + jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE); #ifdef _DEBUG_INSTRUCTION_EXECUTION_ LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value); @@ -250,73 +164,120 @@ int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value) return ERROR_OK; } -int arm966e_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) +COMMAND_HANDLER(arm966e_handle_cp15_command) { int retval; - target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - arm7_9_common_t *arm7_9; - arm9tdmi_common_t *arm9tdmi; - arm966e_common_t *arm966e; - arm_jtag_t *jtag_info; - - if (arm966e_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm966e) != ERROR_OK) - { - command_print(cmd_ctx, "current target isn't an ARM966e target"); - return ERROR_OK; - } + struct target *target = get_current_target(CMD_CTX); + struct arm966e_common *arm966e = target_to_arm966(target); - jtag_info = &arm7_9->jtag_info; + retval = arm966e_verify_pointer(CMD, arm966e); + if (retval != ERROR_OK) + return retval; - if (target->state != TARGET_HALTED) - { - command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd); + if (target->state != TARGET_HALTED) { + command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); return ERROR_OK; } /* one or more argument, access a single register (write if second argument is given */ - if (argc >= 1) - { - int address = strtoul(args[0], NULL, 0); + if (CMD_ARGC >= 1) { + uint32_t address; + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address); - if (argc == 1) - { + if (CMD_ARGC == 1) { uint32_t value; - if ((retval = arm966e_read_cp15(target, address, &value)) != ERROR_OK) - { - command_print(cmd_ctx, "couldn't access reg %i", address); + retval = arm966e_read_cp15(target, address, &value); + if (retval != ERROR_OK) { + command_print(CMD_CTX, + "couldn't access reg %" PRIi32, + address); return ERROR_OK; } - if ((retval = jtag_execute_queue()) != ERROR_OK) - { + retval = jtag_execute_queue(); + if (retval != ERROR_OK) return retval; - } - command_print(cmd_ctx, "%i: %8.8" PRIx32 "", address, value); - } - else if (argc == 2) - { - uint32_t value = strtoul(args[1], NULL, 0); - if ((retval = arm966e_write_cp15(target, address, value)) != ERROR_OK) - { - command_print(cmd_ctx, "couldn't access reg %i", address); + command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32, + address, value); + } else if (CMD_ARGC == 2) { + uint32_t value; + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value); + retval = arm966e_write_cp15(target, address, value); + if (retval != ERROR_OK) { + command_print(CMD_CTX, + "couldn't access reg %" PRIi32, + address); return ERROR_OK; } - command_print(cmd_ctx, "%i: %8.8" PRIx32 "", address, value); + command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32, + address, value); } } return ERROR_OK; } -int arm966e_register_commands(struct command_context_s *cmd_ctx) -{ - int retval; - command_t *arm966e_cmd; +static const struct command_registration arm966e_exec_command_handlers[] = { + { + .name = "cp15", + .handler = arm966e_handle_cp15_command, + .mode = COMMAND_EXEC, + .usage = "regnum [value]", + .help = "display/modify cp15 register", + }, + COMMAND_REGISTRATION_DONE +}; - retval = arm9tdmi_register_commands(cmd_ctx); - arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e", NULL, COMMAND_ANY, "arm966e specific commands"); - register_command(cmd_ctx, arm966e_cmd, "cp15", arm966e_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register [value]"); +const struct command_registration arm966e_command_handlers[] = { + { + .chain = arm9tdmi_command_handlers, + }, + { + .name = "arm966e", + .mode = COMMAND_ANY, + .help = "arm966e command group", + .usage = "", + .chain = arm966e_exec_command_handlers, + }, + COMMAND_REGISTRATION_DONE +}; - return retval; -} +/** Holds methods for ARM966 targets. */ +struct target_type arm966e_target = { + .name = "arm966e", + + .poll = arm7_9_poll, + .arch_state = arm_arch_state, + + .target_request_data = arm7_9_target_request_data, + + .halt = arm7_9_halt, + .resume = arm7_9_resume, + .step = arm7_9_step, + + .assert_reset = arm7_9_assert_reset, + .deassert_reset = arm7_9_deassert_reset, + .soft_reset_halt = arm7_9_soft_reset_halt, + + .get_gdb_arch = arm_get_gdb_arch, + .get_gdb_reg_list = arm_get_gdb_reg_list, + + .read_memory = arm7_9_read_memory, + .write_memory = arm7_9_write_memory_opt, + + .checksum_memory = arm_checksum_memory, + .blank_check_memory = arm_blank_check_memory, + + .run_algorithm = armv4_5_run_algorithm, + + .add_breakpoint = arm7_9_add_breakpoint, + .remove_breakpoint = arm7_9_remove_breakpoint, + .add_watchpoint = arm7_9_add_watchpoint, + .remove_watchpoint = arm7_9_remove_watchpoint, + + .commands = arm966e_command_handlers, + .target_create = arm966e_target_create, + .init_target = arm9tdmi_init_target, + .examine = arm7_9_examine, + .check_reset = arm7_9_check_reset, +};