X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm966e.c;h=4f4764485afe2ac6d952a471d8651319943dffea;hp=70cc3c4b702478adaa21a9a3ea9237247c91c148;hb=e018c7c1d29e8dabb9b4a90bb9eb3574eb1668bb;hpb=69908ddbd04fc9382d02819e296bb4384ef78810

diff --git a/src/target/arm966e.c b/src/target/arm966e.c
index 70cc3c4b70..4f4764485a 100644
--- a/src/target/arm966e.c
+++ b/src/target/arm966e.c
@@ -26,6 +26,7 @@
 
 #include "arm966e.h"
 #include "target_type.h"
+#include "arm_opcodes.h"
 
 
 #if 0
@@ -67,6 +68,13 @@ static int arm966e_verify_pointer(struct command_context *cmd_ctx,
 	return ERROR_OK;
 }
 
+/*
+ * REVISIT:  The "read_cp15" and "write_cp15" commands could hook up
+ * to eventual mrc() and mcr() routines ... the reg_addr values being
+ * constructed (for CP15 only) from Opcode_1, Opcode_2, and CRn values.
+ * See section 7.3 of the ARM966E-S TRM.
+ */
+
 static int arm966e_read_cp15(struct target *target, int reg_addr, uint32_t *value)
 {
 	int retval = ERROR_OK;
@@ -83,26 +91,26 @@ static int arm966e_read_cp15(struct target *target, int reg_addr, uint32_t *valu
 	}
 	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
-	fields[0].tap = jtag_info->tap;
 	fields[0].num_bits = 32;
+	/* REVISIT: table 7-2 shows that bits 31-31 need to be
+	 * specified for accessing BIST registers ...
+	 */
 	fields[0].out_value = NULL;
 	fields[0].in_value = NULL;
 
-	fields[1].tap = jtag_info->tap;
 	fields[1].num_bits = 6;
 	fields[1].out_value = &reg_addr_buf;
 	fields[1].in_value = NULL;
 
-	fields[2].tap = jtag_info->tap;
 	fields[2].num_bits = 1;
 	fields[2].out_value = &nr_w_buf;
 	fields[2].in_value = NULL;
 
-	jtag_add_dr_scan(3, fields, jtag_get_end_state());
+	jtag_add_dr_scan(jtag_info->tap, 3, fields, jtag_get_end_state());
 
 	fields[1].in_value = (uint8_t *)value;
 
-	jtag_add_dr_scan(3, fields, jtag_get_end_state());
+	jtag_add_dr_scan(jtag_info->tap, 3, fields, jtag_get_end_state());
 
 	jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value);
 
@@ -138,22 +146,19 @@ int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value)
 	}
 	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 
-	fields[0].tap = jtag_info->tap;
 	fields[0].num_bits = 32;
 	fields[0].out_value = value_buf;
 	fields[0].in_value = NULL;
 
-	fields[1].tap = jtag_info->tap;
 	fields[1].num_bits = 6;
 	fields[1].out_value = &reg_addr_buf;
 	fields[1].in_value = NULL;
 
-	fields[2].tap = jtag_info->tap;
 	fields[2].num_bits = 1;
 	fields[2].out_value = &nr_w_buf;
 	fields[2].in_value = NULL;
 
-	jtag_add_dr_scan(3, fields, jtag_get_end_state());
+	jtag_add_dr_scan(jtag_info->tap, 3, fields, jtag_get_end_state());
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 	LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
@@ -226,13 +231,16 @@ static const struct command_registration arm966e_exec_command_handlers[] = {
 		.name = "cp15",
 		.handler = arm966e_handle_cp15_command,
 		.mode = COMMAND_EXEC,
-		.usage = "<opcode> [value]",
+		.usage = "regnum [value]",
 		.help = "display/modify cp15 register",
 	},
 	COMMAND_REGISTRATION_DONE
 };
 
-static const struct command_registration arm966e_command_handlers[] = {
+const struct command_registration arm966e_command_handlers[] = {
+	{
+		.chain = arm9tdmi_command_handlers,
+	},
 	{
 		.name = "arm966e",
 		.mode = COMMAND_ANY,
@@ -242,20 +250,13 @@ static const struct command_registration arm966e_command_handlers[] = {
 	COMMAND_REGISTRATION_DONE
 };
 
-/** Registers commands used to access coprocessor resources. */
-int arm966e_register_commands(struct command_context *cmd_ctx)
-{
-	arm9tdmi_register_commands(cmd_ctx);
-	return register_commands(cmd_ctx, NULL, arm966e_command_handlers);
-}
-
 /** Holds methods for ARM966 targets. */
 struct target_type arm966e_target =
 {
 	.name = "arm966e",
 
 	.poll = arm7_9_poll,
-	.arch_state = armv4_5_arch_state,
+	.arch_state = arm_arch_state,
 
 	.target_request_data = arm7_9_target_request_data,
 
@@ -267,7 +268,7 @@ struct target_type arm966e_target =
 	.deassert_reset = arm7_9_deassert_reset,
 	.soft_reset_halt = arm7_9_soft_reset_halt,
 
-	.get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+	.get_gdb_reg_list = arm_get_gdb_reg_list,
 
 	.read_memory = arm7_9_read_memory,
 	.write_memory = arm7_9_write_memory,
@@ -283,8 +284,9 @@ struct target_type arm966e_target =
 	.add_watchpoint = arm7_9_add_watchpoint,
 	.remove_watchpoint = arm7_9_remove_watchpoint,
 
-	.register_commands = arm966e_register_commands,
+	.commands = arm966e_command_handlers,
 	.target_create = arm966e_target_create,
 	.init_target = arm9tdmi_init_target,
 	.examine = arm7_9_examine,
+	.check_reset = arm7_9_check_reset,
 };