X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm966e.c;h=4f4764485afe2ac6d952a471d8651319943dffea;hp=3b85a5cd8689e71d32f9d3889b64a99b4a1c8b1a;hb=e018c7c1d29e8dabb9b4a90bb9eb3574eb1668bb;hpb=269040bbad7f18066f5ec5707447c33de6290ef5 diff --git a/src/target/arm966e.c b/src/target/arm966e.c index 3b85a5cd86..4f4764485a 100644 --- a/src/target/arm966e.c +++ b/src/target/arm966e.c @@ -26,6 +26,7 @@ #include "arm966e.h" #include "target_type.h" +#include "arm_opcodes.h" #if 0 @@ -34,10 +35,10 @@ int arm966e_init_arch_info(struct target *target, struct arm966e_common *arm966e, struct jtag_tap *tap) { - struct arm9tdmi_common *arm9tdmi = &arm966e->arm9tdmi_common; - struct arm7_9_common *arm7_9 = &arm9tdmi->arm7_9_common; + struct arm7_9_common *arm7_9 = &arm966e->arm7_9_common; - arm9tdmi_init_arch_info(target, arm9tdmi, tap); + /* initialize arm7/arm9 specific info (including armv4_5) */ + arm9tdmi_init_arch_info(target, arm7_9, tap); arm966e->common_magic = ARM966E_COMMON_MAGIC; @@ -67,6 +68,13 @@ static int arm966e_verify_pointer(struct command_context *cmd_ctx, return ERROR_OK; } +/* + * REVISIT: The "read_cp15" and "write_cp15" commands could hook up + * to eventual mrc() and mcr() routines ... the reg_addr values being + * constructed (for CP15 only) from Opcode_1, Opcode_2, and CRn values. + * See section 7.3 of the ARM966E-S TRM. + */ + static int arm966e_read_cp15(struct target *target, int reg_addr, uint32_t *value) { int retval = ERROR_OK; @@ -83,26 +91,26 @@ static int arm966e_read_cp15(struct target *target, int reg_addr, uint32_t *valu } arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL); - fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; + /* REVISIT: table 7-2 shows that bits 31-31 need to be + * specified for accessing BIST registers ... + */ fields[0].out_value = NULL; fields[0].in_value = NULL; - fields[1].tap = jtag_info->tap; fields[1].num_bits = 6; fields[1].out_value = ®_addr_buf; fields[1].in_value = NULL; - fields[2].tap = jtag_info->tap; fields[2].num_bits = 1; fields[2].out_value = &nr_w_buf; fields[2].in_value = NULL; - jtag_add_dr_scan(3, fields, jtag_get_end_state()); + jtag_add_dr_scan(jtag_info->tap, 3, fields, jtag_get_end_state()); fields[1].in_value = (uint8_t *)value; - jtag_add_dr_scan(3, fields, jtag_get_end_state()); + jtag_add_dr_scan(jtag_info->tap, 3, fields, jtag_get_end_state()); jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value); @@ -138,22 +146,19 @@ int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value) } arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL); - fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = value_buf; fields[0].in_value = NULL; - fields[1].tap = jtag_info->tap; fields[1].num_bits = 6; fields[1].out_value = ®_addr_buf; fields[1].in_value = NULL; - fields[2].tap = jtag_info->tap; fields[2].num_bits = 1; fields[2].out_value = &nr_w_buf; fields[2].in_value = NULL; - jtag_add_dr_scan(3, fields, jtag_get_end_state()); + jtag_add_dr_scan(jtag_info->tap, 3, fields, jtag_get_end_state()); #ifdef _DEBUG_INSTRUCTION_EXECUTION_ LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value); @@ -165,31 +170,31 @@ int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value) COMMAND_HANDLER(arm966e_handle_cp15_command) { int retval; - struct target *target = get_current_target(cmd_ctx); + struct target *target = get_current_target(CMD_CTX); struct arm966e_common *arm966e = target_to_arm966(target); - retval = arm966e_verify_pointer(cmd_ctx, arm966e); + retval = arm966e_verify_pointer(CMD_CTX, arm966e); if (retval != ERROR_OK) return retval; if (target->state != TARGET_HALTED) { - command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME); + command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME); return ERROR_OK; } /* one or more argument, access a single register (write if second argument is given */ - if (argc >= 1) + if (CMD_ARGC >= 1) { uint32_t address; - COMMAND_PARSE_NUMBER(u32, args[0], address); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address); - if (argc == 1) + if (CMD_ARGC == 1) { uint32_t value; if ((retval = arm966e_read_cp15(target, address, &value)) != ERROR_OK) { - command_print(cmd_ctx, + command_print(CMD_CTX, "couldn't access reg %" PRIi32, address); return ERROR_OK; @@ -199,21 +204,21 @@ COMMAND_HANDLER(arm966e_handle_cp15_command) return retval; } - command_print(cmd_ctx, "%" PRIi32 ": %8.8" PRIx32, + command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32, address, value); } - else if (argc == 2) + else if (CMD_ARGC == 2) { uint32_t value; - COMMAND_PARSE_NUMBER(u32, args[1], value); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value); if ((retval = arm966e_write_cp15(target, address, value)) != ERROR_OK) { - command_print(cmd_ctx, + command_print(CMD_CTX, "couldn't access reg %" PRIi32, address); return ERROR_OK; } - command_print(cmd_ctx, "%" PRIi32 ": %8.8" PRIx32, + command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32, address, value); } } @@ -221,22 +226,29 @@ COMMAND_HANDLER(arm966e_handle_cp15_command) return ERROR_OK; } -/** Registers commands used to access coprocessor resources. */ -int arm966e_register_commands(struct command_context *cmd_ctx) -{ - int retval; - struct command *arm966e_cmd; - - retval = arm9tdmi_register_commands(cmd_ctx); - arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e", - NULL, COMMAND_ANY, - "arm966e specific commands"); - register_command(cmd_ctx, arm966e_cmd, "cp15", - arm966e_handle_cp15_command, COMMAND_EXEC, - "display/modify cp15 register [value]"); +static const struct command_registration arm966e_exec_command_handlers[] = { + { + .name = "cp15", + .handler = arm966e_handle_cp15_command, + .mode = COMMAND_EXEC, + .usage = "regnum [value]", + .help = "display/modify cp15 register", + }, + COMMAND_REGISTRATION_DONE +}; - return retval; -} +const struct command_registration arm966e_command_handlers[] = { + { + .chain = arm9tdmi_command_handlers, + }, + { + .name = "arm966e", + .mode = COMMAND_ANY, + .help = "arm966e command group", + .chain = arm966e_exec_command_handlers, + }, + COMMAND_REGISTRATION_DONE +}; /** Holds methods for ARM966 targets. */ struct target_type arm966e_target = @@ -244,7 +256,7 @@ struct target_type arm966e_target = .name = "arm966e", .poll = arm7_9_poll, - .arch_state = armv4_5_arch_state, + .arch_state = arm_arch_state, .target_request_data = arm7_9_target_request_data, @@ -256,7 +268,7 @@ struct target_type arm966e_target = .deassert_reset = arm7_9_deassert_reset, .soft_reset_halt = arm7_9_soft_reset_halt, - .get_gdb_reg_list = armv4_5_get_gdb_reg_list, + .get_gdb_reg_list = arm_get_gdb_reg_list, .read_memory = arm7_9_read_memory, .write_memory = arm7_9_write_memory, @@ -272,8 +284,9 @@ struct target_type arm966e_target = .add_watchpoint = arm7_9_add_watchpoint, .remove_watchpoint = arm7_9_remove_watchpoint, - .register_commands = arm966e_register_commands, + .commands = arm966e_command_handlers, .target_create = arm966e_target_create, .init_target = arm9tdmi_init_target, .examine = arm7_9_examine, + .check_reset = arm7_9_check_reset, };