X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm920t.c;h=c14f6ef801c9dd02f03acadc248c1118292fe3af;hp=ae8814e5a4e087f4a2dc9dbfbba3a6059187cb04;hb=f370d70670bd5e30befe6fbfbc8d472e760f032b;hpb=d3f0549f08d8aac36143bca9e7f7e1308383b7c2

diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index ae8814e5a4..c14f6ef801 100644
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -48,7 +48,7 @@ int arm920t_handle_read_mmu_command(struct command_context_s *cmd_ctx, char *cmd
 /* forward declarations */
 int arm920t_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
 int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int arm920t_quit();
+int arm920t_quit(void);
 int arm920t_arch_state(struct target_s *target);
 int arm920t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
 int arm920t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
@@ -79,6 +79,7 @@ target_type_t arm920t_target =
 	.write_memory = arm920t_write_memory,
 	.bulk_write_memory = arm7_9_bulk_write_memory,
 	.checksum_memory = arm7_9_checksum_memory,
+	.blank_check_memory = arm7_9_blank_check_memory,
 	
 	.run_algorithm = armv4_5_run_algorithm,
 
@@ -90,6 +91,7 @@ target_type_t arm920t_target =
 	.register_commands = arm920t_register_commands,
 	.target_command = arm920t_target_command,
 	.init_target = arm920t_init_target,
+	.examine = arm9tdmi_examine,
 	.quit = arm920t_quit
 };
 
@@ -334,6 +336,9 @@ int arm920t_read_cp15_interpreted(target_t *target, u32 cp15_opcode, u32 address
 	LOG_DEBUG("cp15_opcode: %8.8x, address: %8.8x, value: %8.8x", cp15_opcode, address, *value);
 #endif
 
+	if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
+		return ERROR_FAIL;
+
 	ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = 1;
 	ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).dirty = 1;
 
@@ -369,6 +374,9 @@ int arm920t_write_cp15_interpreted(target_t *target, u32 cp15_opcode, u32 value,
 	LOG_DEBUG("cp15_opcode: %8.8x, value: %8.8x, address: %8.8x", cp15_opcode, value, address);
 #endif
 
+	if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
+		return ERROR_FAIL;
+	
 	ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = 1;
 	ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).dirty = 1;
 	
@@ -623,7 +631,7 @@ int arm920t_soft_reset_halt(struct target_s *target)
 	reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
 	int i;
 	
-	target->type->halt(target);
+	target_halt(target);
 	
 	for (i=0; i<10; i++)
 	{
@@ -677,7 +685,7 @@ int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *targ
 	
 }
 
-int arm920t_quit()
+int arm920t_quit(void)
 {
 	
 	return ERROR_OK;
@@ -999,6 +1007,9 @@ int arm920t_handle_read_cache_command(struct command_context_s *cmd_ctx, char *c
 	
 	fclose(output);
 	
+	if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
+		return ERROR_FAIL;
+
 	/* mark registers dirty. */
 	ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).valid;
 	ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).valid;
@@ -1260,6 +1271,9 @@ int arm920t_handle_read_mmu_command(struct command_context_s *cmd_ctx, char *cmd
 	
 	fclose(output);
 	
+	if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
+		return ERROR_FAIL;
+
 	/* mark registers dirty */
 	ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).valid;
 	ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).valid;