X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm7tdmi.c;h=d39ef3ffc13f824823030d41b506c8c6118f25d1;hp=3ede36cc9f645a882550f2c0c4542541d4556895;hb=3a550e5b5fe011e526b150a5d234b48e8e2aaad6;hpb=991ed5a2b657e660f744eefddb084724e52938ea

diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 3ede36cc9f..d39ef3ffc1 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -586,7 +586,7 @@ static void arm7tdmi_branch_resume(struct target *target)
 static void arm7tdmi_branch_resume_thumb(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-	struct arm *armv4_5 = &arm7_9->armv4_5_common;
+	struct arm *arm = &arm7_9->arm;
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 	struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
 
@@ -603,7 +603,7 @@ static void arm7tdmi_branch_resume_thumb(struct target *target)
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
 	/* nothing fetched, LDM in EXECUTE stage (2nd cycle) */
 	arm7tdmi_clock_out(jtag_info,
-			buf_get_u32(armv4_5->pc->value, 0, 32) | 1, NULL, 0);
+			buf_get_u32(arm->pc->value, 0, 32) | 1, NULL, 0);
 	/* nothing fetched, LDM in EXECUTE stage (3rd cycle) */
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
 
@@ -631,7 +631,7 @@ static void arm7tdmi_branch_resume_thumb(struct target *target)
 	/* fetch NOP, LDR in Execute */
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, NULL, 0);
 	/* nothing fetched, LDR in EXECUTE stage (2nd cycle) */
-	arm7tdmi_clock_out(jtag_info, buf_get_u32(armv4_5->core_cache->reg_list[0].value, 0, 32), NULL, 0);
+	arm7tdmi_clock_out(jtag_info, buf_get_u32(arm->core_cache->reg_list[0].value, 0, 32), NULL, 0);
 	/* nothing fetched, LDR in EXECUTE stage (3rd cycle) */
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, NULL, 0);
 
@@ -647,9 +647,9 @@ static void arm7tdmi_branch_resume_thumb(struct target *target)
 static void arm7tdmi_build_reg_cache(struct target *target)
 {
 	struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
-	struct arm *armv4_5 = target_to_arm(target);
+	struct arm *arm = target_to_arm(target);
 
-	(*cache_p) = arm_build_reg_cache(target, armv4_5);
+	(*cache_p) = arm_build_reg_cache(target, arm);
 }
 
 int arm7tdmi_init_target(struct command_context *cmd_ctx, struct target *target)
@@ -713,7 +713,7 @@ static int arm7tdmi_target_create(struct target *target, Jim_Interp *interp)
 
 	arm7_9 = calloc(1,sizeof(struct arm7_9_common));
 	arm7tdmi_init_arch_info(target, arm7_9, target->tap);
-	arm7_9->armv4_5_common.is_armv4 = true;
+	arm7_9->arm.is_armv4 = true;
 
 	return ERROR_OK;
 }