X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Farm7tdmi.c;h=d39ef3ffc13f824823030d41b506c8c6118f25d1;hp=25151ff4b9a94d0f8cd72a7bf785c29a484e716c;hb=b48d1f66378fac886d5bc32d7302da48c89d8a75;hpb=c09035ea2cb24dee300476a3502919d23d90d1f5

diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 25151ff4b9..d39ef3ffc1 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -56,8 +56,6 @@ static int arm7tdmi_examine_debug_reason(struct target *target)
 		uint8_t databus[4];
 		uint8_t breakpoint;
 
-		jtag_set_end_state(TAP_DRPAUSE);
-
 		fields[0].num_bits = 1;
 		fields[0].out_value = NULL;
 		fields[0].in_value = &breakpoint;
@@ -70,7 +68,9 @@ static int arm7tdmi_examine_debug_reason(struct target *target)
 		{
 			return retval;
 		}
-		arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL, TAP_DRPAUSE);
+		retval = arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL, TAP_DRPAUSE);
+		if (retval != ERROR_OK)
+			return retval;
 
 		jtag_add_dr_scan(arm7_9->jtag_info.tap, 2, fields, TAP_DRPAUSE);
 		if ((retval = jtag_execute_queue()) != ERROR_OK)
@@ -104,9 +104,9 @@ static __inline int arm7tdmi_clock_out_inner(struct arm_jtag *jtag_info, uint32_
 			2,
 			arm7tdmi_num_bits,
 			values,
-			jtag_get_end_state());
+			TAP_DRPAUSE);
 
-	jtag_add_runtest(0, jtag_get_end_state());
+	jtag_add_runtest(0, TAP_DRPAUSE);
 
 	return ERROR_OK;
 }
@@ -119,9 +119,13 @@ static __inline int arm7tdmi_clock_out_inner(struct arm_jtag *jtag_info, uint32_
 static __inline int arm7tdmi_clock_out(struct arm_jtag *jtag_info,
 		uint32_t out, uint32_t *deprecated, int breakpoint)
 {
-	jtag_set_end_state(TAP_DRPAUSE);
-	arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE);
-	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+	int retval;
+	retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE);
+	if (retval != ERROR_OK)
+		return retval;
+	retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+	if (retval != ERROR_OK)
+		return retval;
 
 	return arm7tdmi_clock_out_inner(jtag_info, out, breakpoint);
 }
@@ -132,12 +136,13 @@ static int arm7tdmi_clock_data_in(struct arm_jtag *jtag_info, uint32_t *in)
 	int retval = ERROR_OK;
 	struct scan_field fields[2];
 
-	jtag_set_end_state(TAP_DRPAUSE);
 	if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
 	{
 		return retval;
 	}
-	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+	retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+	if (retval != ERROR_OK)
+		return retval;
 
 	fields[0].num_bits = 1;
 	fields[0].out_value = NULL;
@@ -217,12 +222,13 @@ static int arm7tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
 	int retval = ERROR_OK;
 	struct scan_field fields[2];
 
-	jtag_set_end_state(TAP_DRPAUSE);
 	if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
 	{
 		return retval;
 	}
-	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+	retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+	if (retval != ERROR_OK)
+		return retval;
 
 	fields[0].num_bits = 1;
 	fields[0].out_value = NULL;
@@ -230,11 +236,15 @@ static int arm7tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
 
 	fields[1].num_bits = 32;
 	fields[1].out_value = NULL;
-	jtag_alloc_in_value32(&fields[1]);
+	fields[1].in_value = in;
 
 	jtag_add_dr_scan(jtag_info->tap, 2, fields, TAP_DRPAUSE);
 
-	jtag_add_callback4(arm7endianness, (jtag_callback_data_t)in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[1].in_value);
+	jtag_add_callback4(arm7endianness,
+		(jtag_callback_data_t)in,
+		(jtag_callback_data_t)size,
+		(jtag_callback_data_t)be,
+		(jtag_callback_data_t)in);
 
 	jtag_add_runtest(0, TAP_DRPAUSE);
 
@@ -576,7 +586,7 @@ static void arm7tdmi_branch_resume(struct target *target)
 static void arm7tdmi_branch_resume_thumb(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-	struct arm *armv4_5 = &arm7_9->armv4_5_common;
+	struct arm *arm = &arm7_9->arm;
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 	struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
 
@@ -593,7 +603,7 @@ static void arm7tdmi_branch_resume_thumb(struct target *target)
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
 	/* nothing fetched, LDM in EXECUTE stage (2nd cycle) */
 	arm7tdmi_clock_out(jtag_info,
-			buf_get_u32(armv4_5->pc->value, 0, 32) | 1, NULL, 0);
+			buf_get_u32(arm->pc->value, 0, 32) | 1, NULL, 0);
 	/* nothing fetched, LDM in EXECUTE stage (3rd cycle) */
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
 
@@ -621,7 +631,7 @@ static void arm7tdmi_branch_resume_thumb(struct target *target)
 	/* fetch NOP, LDR in Execute */
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, NULL, 0);
 	/* nothing fetched, LDR in EXECUTE stage (2nd cycle) */
-	arm7tdmi_clock_out(jtag_info, buf_get_u32(armv4_5->core_cache->reg_list[0].value, 0, 32), NULL, 0);
+	arm7tdmi_clock_out(jtag_info, buf_get_u32(arm->core_cache->reg_list[0].value, 0, 32), NULL, 0);
 	/* nothing fetched, LDR in EXECUTE stage (3rd cycle) */
 	arm7tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, NULL, 0);
 
@@ -637,9 +647,9 @@ static void arm7tdmi_branch_resume_thumb(struct target *target)
 static void arm7tdmi_build_reg_cache(struct target *target)
 {
 	struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
-	struct arm *armv4_5 = target_to_arm(target);
+	struct arm *arm = target_to_arm(target);
 
-	(*cache_p) = arm_build_reg_cache(target, armv4_5);
+	(*cache_p) = arm_build_reg_cache(target, arm);
 }
 
 int arm7tdmi_init_target(struct command_context *cmd_ctx, struct target *target)
@@ -703,7 +713,7 @@ static int arm7tdmi_target_create(struct target *target, Jim_Interp *interp)
 
 	arm7_9 = calloc(1,sizeof(struct arm7_9_common));
 	arm7tdmi_init_arch_info(target, arm7_9, target->tap);
-	arm7_9->armv4_5_common.is_armv4 = true;
+	arm7_9->arm.is_armv4 = true;
 
 	return ERROR_OK;
 }